Ci Input Capacitance JEDEC – no definition offered TI – The capacitance of an input terminal of the device. This parameter is the internal capacitance encountered at an input of the device. The values that are given are not production-tested values. Normally, they are typical values given for the benefit of the designer. These values are established by the design, process, and package of the device. This tutorial is based on the Understanding and Interpreting Standard Logic Data Sheets application report (SZZA036). To download the full PDF version of this application report, please use the following URL: http://www.ti.com/lit/szza036
Ci Input Capacitance
JEDEC – no definition offered
TI – The capacitance of an input terminal of the device.
This parameter is the internal capacitance encountered at an input of the device. The values that are given are not production-tested values. Normally, they are typical values given for the benefit of the designer. These values are established by the design, process, and package of the device.
This tutorial is based on the Understanding and Interpreting Standard Logic Data Sheets application report (SZZA036). To download the full PDF version of this application report, please use the following URL: http://www.ti.com/lit/szza036
Hi,
We are doing design based on OMAP processor,since memory bus of this processor has output capacitance of 15.9pF,i would lie to add buffer for these signals, Can anyone please suggest buffer with 1.8V VCC?
As well as pleas suggest what are the parameters i need to consider while selecting the buffer mainly for this kind of purpose.
Really i need someones help urgently. please do the needful.
Regards,
Murugan
Hi Murugan
How many lines do you need to buffer?
I am planning to give buffer for 16 data lines and 6 control signals.
Because only data lines and control signals are shared to many devices.
Please suggest.
Hello Muragan
The SN74LVC16244 would cover the 16 lines and SN74LVC244 would cover 8 aditional lines.
The next step would be 32 bit which would be the SN74LVC32244
Hi chris,
I want to add buffer for datasignals (bidirectional). So i need to select transceiver with DIR control pin.
One more thing clarification is
IOH & IOL=4mA when Vcc=1.65 mentioned in lot of transceivers. In this case how the current will be sufficient to drive?
Please let me know your suggestions.
Murugan.M
The 245 fucntion would have the Dir pin. The drive would be about 4ma which should drive several Cmos inputs. LVC is the highest drive part we have that works at this voltage.
The SN74LVC16245 would cover the 16 lines and SN74LVC245 would cover 8 aditional lines.
The next step would be 32 bit which would be the SN74LVC32245
Hi Chris,
Please clarify, on what basis we can say that IoH/IoL of 4mA can be sufficient to drive several CMOS inputs. Please help me to understand.
One more thing is, we are using TXB0108PWR (auto sensing) level translator for our application. It's driving capability is IoH/IoL=20uA. In most of the datasheets they are specifying that under test conditions.
Please let me know how this 20uA current is sufficient to drive the load like LED and all.
In this case how can we select the level translators? please clear this basic doubt.
Cmos inputs are high impedance, greater than 1Mohms so they do not load the signals very much. their load is mostly capacitive.
3 Cmos inputs is about 15pf typical. Our parts are tested into 30pf or 50pf. So they will have no problem fanning out to several Cmos inputs.
The TXB0108 does not have much drive so it would not be able to drive multiple loads or LEDS on its own. You need to read the application information in the datasheet for its limitations.
Yes. Does TI support any alternate auto sensing level translator with more drive strength?
If so please suggest.
Thanks and Regards,