Power-Up 3-State (Z)

The power-up 3-state (PU3S) feature ensures valid output levels during power up and ensures the valid high-impedance state during power down. The output enable pin (OE) must be tied high (to VCC) through an external pullup resistor (see Figure below). For more information, see IOZPD and IOZPU specifications in the electrical characteristics section.


This tutorial is based on the Understanding and Interpreting Standard Logic Data Sheets application report (SZZA036).  To download the full PDF version of this application report, please use the following  URL:  http://www.ti.com/lit/szza036