Cpd Power-Dissipation Capacitance
JEDEC – no definition offered
TI – This parameter is the equivalent capacitance used to determine the no-load dynamic power dissipation per logic function for CMOS devices.
PD = Cpd (VCC)² f + ICC VCC
The Cpd test is a measure of the dynamic power a device requires with a specific load. The values given on the data sheet are typical values that are not production tested. These values are defined by the design and process of the device. For more information on Cpd, refer to the TI application report, CMOS Power Consumption and Cpd Calculation, literature number SCAA035.
This tutorial is based on the Understanding and Interpreting Standard Logic Data Sheets application report (SZZA036). To download the full PDF version of this application report, please use the following URL: http://www.ti.com/lit/szza036