Logic Forum - Recent Threads

SN74LVC125APW has Ioff circuitry ?

Tomohiko Sugiyama — Thu, 16 May 2013 10:04:22 GMT

SN74LVC125APW has Ioff circuitry ?

When Vcc = 0V , Input & output is Hi-z ?

I want to know SN74LVC125APW can support partial-power-down applications as well as SN54LV244A.

Best regards

CD4046B

Adam Parker — Fri, 17 May 2013 14:50:16 GMT

Out of curiosity, what is the max frequency of Phase Compirator I in this chip?

SN74LV123A Behavior

Go — Fri, 17 May 2013 14:06:18 GMT

Hi,

If those Input pin Logic level are fixed as follows during power-up,

How will the Rext/Cext pin go?

Input A :Low Input B : High Input /CLR : High

thanks

CD40109B IBIS Model File

Sadanori Kato — Thu, 16 May 2013 01:10:28 GMT

My customer is looking for the IBIS model file of CD40109B(CMOS Quad Low to High Voltage Level Shifter).
I was not able to find it on the home page of TI.

If you know the location of the IBIS model file, please let me know.

Best Regards,
Kato

SN74LV8153 problem

Noel Farrugia — Wed, 22 Feb 2012 11:46:21 GMT

Hi,

I am using the SN74LV8153 serial to parallel interface but I cant seem to get it working because all the outputs all stay at 0. Does any one has a circuit diagram of how he connected it or a sample bitstream please?

eSATA transceiver

Borge Strand-Bergesen — Thu, 16 May 2013 11:44:37 GMT

Hi,

I'm designing a product where an FPGA has SATA transceivers and where conversion to external eSATA levels are needed. Does TI provide such an interface chip?

Best regards,

Borge

Output enable on SN74AVC32T245

Vinayak Gokhale — Mon, 27 Aug 2012 15:38:27 GMT

Hello,

I hope I am posting in the right forum. We need to use this for our research. The output enable information seems a bit sketchy for me. The truth table says that the OE' is active low and hence, obviously, is connected to L. The description/ordering information (1st page, last paragraph) says that OE' needs to be connected to POWER through a pull up. It gives very little information about the pull up. Anyone have any ideas what it is trying to say?

Thank you

Octal 3 state buffer with Schmidt Trigger inputs

Darko Hadzidedic — Fri, 10 May 2013 13:41:53 GMT

I am looking in way to detect presence of 20+ AC signals by rectification and multiplexing and taking them to 8 micro inputs. Few cycles delay in detecting is OK.

My first choice is to use RC filtering followed by tri state buffer. However, filter creates very slow edges or could be stuck between the levels for long time (hence need for Schmidt input). 74HC7540 from NXP looks as ideal part, but it is pricy and seems as single source. Does TI have cross reference or similar part (i.e octal tristate buffer with Schmidt Trigger inputs). Other solution is 74xx14 feeding the ‘regular’ buffer. It is 2 x cheaper, but more real estate is needed for additional componets.

Thanks,
Darko

SN74LVC16244A active bus hold circuitry?

David DeBaun — Thu, 09 May 2013 19:40:51 GMT

Hello,

The SN74LVC16244A datasheet has a footnote on page 5:

(1) All unused inputs of the device must be held at Vcc or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

When I look at this app note, Figure 18 and Table 1 seem to suggest that all parts in the LVC Widebus family have active bus hold incorporated. However, I can't find anything explicitly on the SN74LVC16244A datasheet to confirm this (which I believe is part of this family). For instance, it is very clearly stated on the SN74LVTH244A-EP datasheet: "Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors". The SN74LVC16244A datasheet does not say anything like this anywhere.

In summary: Do I need to include external pullups and pulldowns on the inputs of the SN74LVC16244A?

SN74LVC2G74DCUR start up state

JoeY_937 — Thu, 09 May 2013 19:32:36 GMT

What will be the start-up state of Q and ~Q for the SN74LVC2G74DCUR D flip-flop? The clock will be low, ~PRE and ~CLR will be high. D will be low.

Thanks!

SN74LVC1G07DCKR - Missing Voh info from the datasheet

Lennon Low — Wed, 08 May 2013 07:54:53 GMT

For this SN74LVC1G07DCKR – Single buffer with open-drain output, what is the Voh (min) and Voh (max) when supply with 3.3V with different output current level?

Output Current, Ioh : 0mA ~ 3.5mA

Voh min : ?? Voh max : ??

MDIO MDC level translator & buffer [NPI]

Johnny Lau — Fri, 05 Mar 2010 19:02:18 GMT

There is a need for MDIO MDC level shifting and buffering at Networking accounts. See attached for a proposal of what it might look like

TL1431 Failure rate

Chandrasekaran M — Wed, 14 Sep 2011 09:44:54 GMT

Hi,

We need failure rate of ic TL1431QD. We require the information or reliability sheet about the IC. I am unable to get the info from product page. Please help.

Regards,

Chandru

Difference between TCA9554 and PCA9534

Martin Gustafsson — Tue, 07 May 2013 08:21:09 GMT

Hi!

I am looking into if I should use the PCA9534 or the TCA9554. What is the difference between these devices?

Best regards, Martin

Level Translation for SN74CBT3245A

Dang heng — Tue, 07 May 2013 04:32:37 GMT

hi there,

Just wondering what is the Voh for SN74CBT3245A as it is not stated on the datasheet.

or is this chip a open drain type?

I am looking for one that can match TC7MBD3245AFK from TOSHIBA

Thank you in advance

Adam

Can you operate Shift Register SN74HC595 on mixed voltages ?

Brian Clark — Fri, 03 May 2013 01:26:55 GMT

Hi- can you apply 5V to the Vcc but use 3.3V on the logic inputs on the above IC ? Secondly, the datasheet doesn't specifically describe performance with 3.3V on Vcc but can someone guide whether there would be any issues running the chip on 3.3V?

NEED INFORMATION- SN74AUC1G125-EP (CAUC1G125MDCKREP)

Jayakumara krishnasetty — Tue, 30 Apr 2013 17:00:37 GMT

Hi Can you please provide the following information for the SN74AUC1G125-EP (CAUC1G125MDCKREP) Part ?

Thermal Resistance Junction to Case (Theta JC)

Power Logic Shift Register TPIC6C595

Peter Gerlesberger — Fri, 26 Apr 2013 08:39:43 GMT

Hello,

could somebody tell me, if the following statment of a ti application report slpa004a-1.pdf is valid for TPIC6C595 too?

"The logic used is specified within the data sheet to operate from 4.5 V to 5.5 V, but it is capable of operation
down to 3 V and up to an absolute maximum voltage of 7 V. The CMOS transistors used in the digital logic
have small feature sizes and short channel lengths as well as tightly controlled, low threshold voltages. Due
to these characteristics, the CMOS gains are high, and the parasitic capacitance is minimized. Because of
this, the logic is able to function at greater than 25-MHz operation over the full VCC range of 3 V to 7 V
and over the temperature range of –40°C to 125°C."

Best regards,

Peter

How to split an 86Mhz signal??

BH4636 — Fri, 26 Apr 2013 19:48:53 GMT

I need to drive 2 loads with the 24 bit parallel RGB video signal from an OMAP 3530. I will have a max frequency of 86MHz. Can I use a logic chip like the SN74ALVCH162830 to do this or is there a better way? Thanks

Logic question

Silver Diamond — Mon, 22 Apr 2013 14:01:41 GMT

Would someone be kind enough to explain the H, X an Z are on the diagram below. It is found in sn74ahc244-ep.pdf for SN74AHC244-EP.

And actually I am really looking for something simple like the SN74LVC2G06-EP but non inverting. I am using MSP430 at 2.3Volts and I need to drive 5 Volt output. Any product suggestion would be appreciated.

Thanks...

SN74CBTD3384DW and HPI on DSP TMS3206713

Michael Jones52345 — Tue, 08 Mar 2011 17:20:56 GMT

Hello,

I would like some recommendations for interfacing to the HPI on dsk6713.

I am using a 5V micro controller as host that drive pins at 10mA.

I am currently trying out the following bus switch/voltage translator.

SN74CBTD3384DW

Would a line driver/buffer be more appropriate?

Anybody have any suggestions.

Thanks

FNG

SN74LVC2G06-EP not working

Silver Diamond — Mon, 22 Apr 2013 20:26:30 GMT

I am trying to use this inverter but have no luck with getting anything from Y1. When the 1A is low, I get no output. My VCC is at 5.08V, Logic input when high is 3.6V when low is 0V. Any suggestions?

Maximum Junction temperature and Thermal resistance value for SN74LVC1G97DCKRG4

David Escandon — Mon, 22 Apr 2013 20:58:04 GMT

TI Team,

I need the maximum junction temperature and thermal resistance values for the SN74LVC1G97DCKRG4.

-David

P.S> Where on the website can I find this information?

Maximum Junction temperature and Thermal resistance value for SN74LVTH162245DGGR

David Escandon — Mon, 22 Apr 2013 20:56:30 GMT

TI Team,

I need the maximum junction temperature and thermal resistances for the SN74LVTH162245DGGR.

-David

PS. Where can I find this on the website?

ADS1299 with pic

Jaballi Maher — Sat, 13 Apr 2013 10:53:19 GMT

ADS1299