I'm designing a periodic clock to drive two 8-bit shift registers in a PISO arrangement, for visual input status monitoring with an oscilloscope.
It's a good/bad status indicator, where I need to differentiate the 16bits, by inserting a space (say 16 bits of all zeros) between each set of 16. The remaining 13 bits are error status bits. Say a duty cycle of 50% and repeat endlessly. The 16 data bits for viewing have a start bit and two end bits held high every time, in order to visually differentiate the start and end. This way, bit 4 being held high, for example is easily identified as an error.
The LS123 looks like a good bet to use the two sections to create a clock which is 16 bits long and then stops for 16 bits. This would create the effect of the 16 data bits being separated by an equal length visual "empty space". Any ideas on how to make the LS123 behave in a periodic fashion as described? The clock should be low-ish frequency ...say 200kHz, which would allow conservative settings, timebase-wise on the scope.
Thanks,
G
