I need to have an fpga "listen" to RGMII trafic between processor and PHY. For that I need two hex buffers or 1:2 mux's with very low skew ( < 500ps ).
Processor and PHY use 3V3 but fpga can use both 1V8 or 3V3.
I would appreciate any suggestions as I haven't been able to find anything for days now.