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TS5A3157 design issue

Other Parts Discussed in Thread: TS5A3157

Dear Team:

 customer used capacitor at input of TS5A3157 that output seems to get bias vcc/2.

If don't use capacitor on input of TS5A3157 that output will be clamp.

Is it correct?

  • Hi Thomas chang ,

    The input I assume is the I/O ports you are talking about and not the select pin.
    There are clamp diodes on the I/O ports to Vcc and gnd which shouldnt be fwd biased in normal operation .
    It looks like the Ain is swinging across 0v line going negative which needs avoided.
  • Dear Team:

     It is audio signal application, so input signal have +/- voltage.

    About Clamp waveform test setup: 1.removed L81 & C23,Audio signal jump wire from AIN_L to LINE_IN_L,2. removed U37 _pin3 connection,  (In=Low, COM connect to NC)

    About Bias waveform test setup:1.removed U37 _pin3 connection,  (In=Low, COM connect to NC), 3. measured C23 left and right side waveform (AIN_L & LINE_IN_L), waveform have offset, but if removed U37_Pin3 & U37_Pin4 connection, measured C23 left and right sideAIN_L & LINE_IN_L waveform is same withouot offset. P.S. R18771 & R18772 are NC


  • Dear Team:
    Could you reply me?
  • Hi Thomas,

    The circuit shown doesn't provide any DC bias to the audio signal going into the TS5A3157, so clipping is to be expected.  Allow me to explain what is happening in each circumstance for your posts, then I will suggest a circuit to fix the issue.

    In the above image, the yellow highlighted path is the audio signal path.

    The blue circle indicates a low-pass filter designed to remove high frequency ( > 10MHz ) noise.

    The black circle indicates a resistor connecting one side of the coupling capacitor C23 to analog ground.  This ensures that the left side of the audio signal path starts at ground and reduces pops when an audio plug is inserted into the jack.

    The red highlighted side of the capacitor indicates a floating node -- the signal at this point ONLY has an AC component, and the DC value is undefined.

    I'm sure at this point you are thinking, but if I disconnect the 'NC' pin, that node has a DC bias of 2.5V -- Emrys you don't know what you are talking about!  Well, let me explain what's happening there.

    Inside the TS5A3157 on every channel IO pin (COM, NC, NO) there are two clamp diodes used for ESD protection.  They are connected like this:

    I only drew the COM and NC pins, but the NO pin has the same configuration.

    The highlighted path will have a very low leakage current (on the order of 1 nA).  When you disconnect the NC pin, essentially making this a floating voltage node, this current will provide a Vcc/2 bias to the COM pin.  When a load is connected, the current is too small through the diodes to provide a stable DC bias and the line drops to 0 DC bias.

    The best way to fix this situation would be to add DC bias to allow the signal to pass through the circuit, then if you want to remove the DC bias, another coupling capacitor could be used prior to the input to your system.  Here is one solution that would work:

    You could also use a voltage reference to provide Vcc/2 instead of the circuit shown here.

  • Dear Team:

     Thanks for your explaination detail.

    I think it is useful information for applicaiton, so would you have plan to add it in datasheet?

  • I was thinking I should turn this into an application note attached to all of our analog switches. Hopefully it will help others who are doing similar things! If I'm lucky, I will be able to get it published in January.