In the actual application, we find that the locked output (Q) will have the output of the indefinite state. At present, we suspect that it is caused by the upper current sequence, please help to analyze.
1. What is the correct electrical time sequence of this chip?OE, VCC and D
2. If not according to the current sequence operation, the output transient is abnormal.
3. What is the situation and how to avoid the switch of electric power in OE and VCC?