CD74HC4538: Latch-up from EMP?

Hello,

I am using an CD74HC4538E in a circuit in an environment with EMP events.
After an EMP event about 50% of the time the Q output drops to 1.5v, and does not
return to 5v even after the pulse time set by the RC. It will only recover by cycling the Vcc power.
Also the chip gets warmer then normal after going into this state. And it is not getting loaded
down by by the external circuitry.
Dose this seem like a latch-up condition?

I have a .1uf bypass cap and I do not see a transient in Vcc voltage(5v).
The inputs and outputs all go to other logic chips on the board, so I should not be getting any
transients from them. The longest trace length from another chip is maybe 3".
The EMP is about 1Mhz for about 10us.

Has anyone else had experience with the CD74HC4538E going into an undefined or latch-up
state from an EMP or other condition?

Has the CD74HC4538E been tested for latch-up using the JESD78 standard?
Would another version of the xx4538 timer (eg. CD14538 or CD74HCT4538) be
less likely to have issues during an EMP event?

Thanks for any help,
Jim