This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN74LVC1G125: how to calculate the maximum allowable clock input

Part Number: SN74LVC1G125

Hi,

I want to know how to calculate the maximum allowable clock input of a logic IC, such as SN74LVC1G125 buffer.

The datasheet doesn't specify the maximum allowable input rate for transition signals such as clocks.

Thanks,

Seung-Gon.