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This question is really about the input structure of a logic device.
There are primarily two types of CMOS input structures - one with a positive clamping diode, and one without, shown here:
The positive clamp diode is shown in red. If the input voltage is higher than Vcc, then the positive clamp diode will become forward biased and will allow current to flow through to Vcc. This has two primary effects. First, it can provide power to the Vcc rail (this is an example of "back-powering" a device). Second, it's possible for the current through the clamp diode to become so large that it can permanently damage the device. This current limit is rated as "I_IK" in the datasheet, and is found in the absolute maximum ratings table. Here's an example of a device's abs max table with an input clamp diode
Note that the input clamp current can be turned on two different ways - going into the part (+20mA) and out of the part (-20mA) and there is a condition of V_I < 0 or V_I > Vcc. These are two indicators that there is a positive clamp diode. here's an example abs max table for a device without a positive clamp diode:
In this table, you can see that the positive current value and the condition of V_I > Vcc are both absent. This indicates that there is no positive clamp diode.
Another indicator is the maximum value on the input voltage. For a device with a clamp diode, the input voltage will be limited to Vcc or Vcc + 0.5V, however a device without the positive clamp diode will have a numerical value. In the example above, 6.5V can be applied to the input of the devce without damaging it, regardless of the value of Vcc.
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