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Part Number: LSF0108
I currently use a LSF0108 to perform +3.3V to/from +1.8V translation on a first board. Conversion is OK.
In some case, I need to cascade 2 LSF: connect first previous board (and so using first LSF +3.3V <-> +1.8V) to a second board (and so using a second LSF +1.5V <-> +3.3V).
Problem occurs in such situation: +1.8V -> +3.3V -> +1.5V.
When my device at +1.8V logic outputs a logical zero, Ax signal (first LSF) is around 0.6V (I suppose it corresponds to the Vab voltage described in video 'Down translation with the LSF family'). As voltage at Bx is slighty higher than Ax, Bx of first LSF is around 0.65V and again Ax of second LSF is around 0.7mV... which is higher than the Vil of my device (0.35x1.5V=0.525V) and so sampling data at +1.5V fails.
I am a bit confused with the 0.6V. Does it seem to be a bit too high? Is it a correct behaviour? How can we evaluate this Vab?
May I need to have higher resistance to minimize sink current?
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In reply to Dylan Hubbard:
I merged the two boards... If there a problem if one LSF is at +3V3 while other is at +2V5?
R13 is required for module attached to DATA_INPUT/DATA_OUTPUT.
My FPGA is at +1.5V. So the trouble with Vih...
In reply to Emrys Maier:
In reply to sylvain buriau:
Yes it is still confusing for me...
I received a production lot of 4 boards. Only 2 boards are fully functionnals even if I use only one LSF (FPGA +3.3V -> LSF -> device compatible with +1V8), as represented in the below schematic:
Note: R13 resistor is needed because of device requirement.
For the 2 working boards, I've got the following scope shots. I represent the path 'CAM_IR_Tx to DATA_INPUT' (down translation) (sorry for the quality):
-> Even if it is not perfect (is it possible to have a lower VOL level?), my device answers correctly.
For the non-working board, I have:
No visible activity
I don't understand why the low level is around +1.25V (against +0.5V in the good board). And even if this is quite a high value, I see nothing on LSF output...
May the boards be damaged?
I change resistor R13 from 200ohms to 20k and 100k without any improvement.
Thanks for your support!
There are a few things I want to address here. First, is the signal path. You said it was CAM_IR_Tx to DATA_INPUT, but from your schematic it looks like it is supposed to be CAM_IR_Tx to DATA_OUTPUT. Can you confirm?
The second thing is the drive capability of the FPGA. When driving low, it has to be able to sink about 17 mA due to R12. It seems like the FPGA is having a hard time doing this since the VOL values are pretty high. Changing R13 may not have an effect on the translation due to my first statement. I would increase the value of R12 to make it easier for your FPGA to drive Low closer to 0 V. This should help the pass through FET turn on.
Also, to get a better understanding of how the LSF operates we have a great training series that you can watch. See link below to watch the video that covers down translation specifically:
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