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Part Number: SN74LV4046A
I'm trying to do binary FSK modulation / demodulation using two SN74LV4046A, one to modulate and one to demodulate.
I built a test circuit based on the example in SLAA618 (Implementation of FSK Modulation and Demodulation using CD74HC4046A).
I've also pored over SCHA003B (CMOS Phase-Locked-Loop Applications Using the CD54/74HC/HCT4046A and CD54/74HC/HCT7046A).
VCC = 5V
On both modulator and demodulator, I am using:R1 = 4.42kOhmR2 = openC1 = 27pF
On demodulator, the low pass filter is connected as shown in figure 4 of above application note, with:R3 = 36kOhmC2 = 100pF
Input to the modulator is:1.36V to represent binary 0 -> produces 10MHz at modulator VCO output3.1V to represent binary 1 -> produces 20MHz at modulator VCO output
I am having trouble at the demodulator. I was hoping to recover approximately the same voltages as input to the modulator (or at least have good voltage separation), then use a Schmitt trigger logic gate to bring that output back to normal TTL levels.
I alternately tried using Phase Comparator 1, and Phase Comparator 2.
When using Phase Comparator 1:* When input to modulator is 1.36V producing 10MHz, output voltage at DEMout is about 2.75V.* When input to modulator is 3.1V producing 20MHz, output voltage at DEMout about 2.28V.
Therefore, there is not enough voltage separation, so the Schmitt trigger logic gate does not distinguish between the two states (its output is always high).
When using Phase Comparator 2:* When input to modulator is 1.36V producing 10MHz, output voltage at DEMout seems to oscillate at high frequency (too high for my scope) between 880mV and 2V.* When input to modulator is 3.1V producing 20MHz, output voltage at DEMout oscillates similarly between 2.2V and 4V.
This is producing totally meaningless output.
All of the below are using Phase Comparator 1:
When input to modulator is 1.36V representing "binary 0":
Input to modulator VCO, 1.36V:
Modulated signal, 10MHz (9.8 MHz in this photo):
Output of Phase Comparator 1:
Output at DEMout:
When input to modulator is 3.1V representing "binary 1":
Input to modulator VCO, 3.1V:
Modulated waveform, 20 MHz:
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In reply to Emrys Maier:
Thank you for your reply...
Regarding DATA_TX and DATA_RX, the idea is to (eventually) connect those to a UART operating at 115200 BAUD -- but right now DATA_TX is connected to a potentiometer allowing to input any DC voltage from 0 to 5V to demonstrate that the level shifter is working correctly. So we are not altering the input signal at high speed at this time.
The circuit board includes other hardware but it is not being used at this time. The jumper blocks at J3 and J8 are removed, disconnecting other hardware from the circuit, and there is a jumper wire installed from J3-1 to J8-1, which connects the modulator VCO_OUT directly to the demodulator SIG_IN.
In reply to twelve12pm:
Thanks again for your reply.
That input signal noise concerned me as well. It is coming from a simple potentiometer and measured very cleanly without the PCB. Once the PCB is connected and powered, the noise appeared. This continued even after I played with some LPF values to smooth that huge overshoot/undershoot we saw.
It occurred to me that other parts in the circuit may be injecting noise into the ground, so I assembled a portion of a second PCB with only the modulator and its passives, no other ICs. I populated R9/C5 at the VCO input with a 120ohm 33pF LPF and I added the same values at the modulator output. The modulator output is now rounded off quite a bit.
I've also gotten much better oscilloscope images by saving them from the scope rather than snapping photos with my phone!
The noise at the potentiometer input is much reduced but it is still as high as 320mV p-p.
I'll attach the new modulator images for reference and then I'll populate the demodulator section and we'll see what happens.
In the meantime I appreciate any thoughts or suggestions.
Oscilloscope images below show:* Channel 1 = modulator output (yellow)* Channel 2 = VCOin from potentiometer (blue)
At the bottom of each screen capture, you can see the readouts of modulator frequency (Freq, yellow), modulator output peak/peak voltage (Vpp, yellow), VCOin voltage (Avg, blue), and noise on VCOin (Vpp, blue).
Screen captures are shown in this order:
The values we (currently) intend to use in the real application:
Followed by other values of VCOin / frequency out for reference:
(These frequencies are different than what I calculated using SCHA003B but I recognize that that application report discusses the older CD54/74HC/HCT4046A.)
Schematic of the reduced circuit I have now -- see oscilloscope captures and explanation in previous post:
I'm going to populate the demodulator 4046A and its passives... be back soon
I assembled a PCB that has only the modulator and demodulator and their passives (no other ICs) to eliminate anything that might have introduced noises etc. The previous two posts document assembly and measurements of the modulator. Now I added the demodulator as shown in the following schematic:
Results are very similar to before: the DEMout output is unusable for recovering the input signal to the modulator. There must be some mistake in the design.
Once again, I am showing the captures in the following order:
I am showing results for Phase Comparator 1 followed by Phase Comparator 2.
Measurements at the bottom of each oscilloscope capture show:
Please let me know if you need any other measurements from the circuit.
Thanks for helping.
Using Phase Comparator 1 at Demodulator:
Using Phase Comparator 2 at Demodulator:
I noticed that the RC filter on the output of the phase comparator is reverse:
The input at pin 9 likely has 5 to 10pF of input capacitance, so you're still getting some filtering, but the corner frequency is probably a decade higher than you would like.
If it's possible, can you grab a scope shot of the DEM_OUT when it's really ugly and trigger off that? I'd like to see what frequency it's oscillating at and how that relates to the VCO output. They seem to be unrelated.
Also, can you try reducing the size of R32? I'm wondering if adding some load to the unity gain amplifier between VCO_IN and DEM_OUT will kill that oscillation you're seeing.
Thanks again for your input.
You are absolutely right about the RC filter being backwards. I have been looking at this circuit for days and never saw it! Thank you for seeing it!
Obviously I will need to fix that. It looks like that will require cutting some delicate work, so before I do that, I will grab the scope shot for you of DEM_OUT as the circuit stands now. Then I will go perform some surgery.
There are two scope shots here, showing what happens with Phase Comparator 1, then Phase Comparator 2.
I'm triggering off DEM_OUT. I changed the timebase to 500ns so we can see that signal a bit better.
Again, these captures are before making any changes to the circuit.
With Phase Comparator 1:
With Phase Comparator 2:
DEM_OUT here is usually 1.1 MHz but occasionally goes to about 1.3 MHz for a brief moment, then returns to 1.1 MHz.
I also tried to use channel 2 (blue) to capture the VCO_OUT of the demodulator instead of VCO_IN of modulator, but that just creates a mess, I'm guessing because of added capacitance from my scope probe. This is with phase comparator 1:
And with phase comparator 2:
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