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LSF0108: LSF0108 Maximum Propagation Delay?

Part Number: LSF0108
Other Parts Discussed in Thread: LSF0204, TINA-TI, SN74LVC8T245, SN74AXC8T245

The  LSF0108 datasheet lists typical values for TpLH and TpHL in the tables on pages 7 and 8 for various circuit configurations.  Can you provide the maximum values for these same circuit configurations?  Customers need to know the max value to build an error budget for timing.  I think this information should be added to the datasheet

I know what you said in old topic that:

LSF0108 datasheet lists typical values for TpLH and TpHL in the tables on pages 7 and 8 for various circuit configurations.  Can you provide the maximum values for these same circuit configurations?  Customers need to know the max value to build an error budget for timing.  I think this information should be added to the datasheet.

I want to know ,The LSF0204 appears to be a similar device that we do provide maximum specs for.  The maximum specs are given for particular RL and capacitor loads.  I think we could do the same for LSF0108

  • Hi Seasat,
    I would highly recommend watching the video series on the LSF family of translators located here: training.ti.com/logicminute

    The entire LSF family is composed of passive switches. These devices do not contain buffers in their active channels, and thus do not realistically add delay to the surrounding circuit. The delay is controlled by the RC components around them, and these are values that can easily be calculated.

    What your customer really needs to do is to determine their parasitic capacitances, the required pull-up resistors, and then use _those_ values to determine the delays. The results will be far better than anything I could add to the datasheet.

    If it would help, I can provide a Tina-TI simulation of the LSF that they could work with to learn more.
  • Thanks a lot for your quickly response.

    Can you give me a recommended RC value? Customers want to support the speed of 65MH in the system. What is the RC value at this point? What's the delay?

  • Hi Seasat,

    The LSF as mentioned are passive switches. The low signal passes through without delay( very minimal ~0.1ns).
    The high signal requires pullup resistance, trace capacitance, temp , tolerances of resistance etc and hence dependent on external factors beyond LSF device's control. Usually the buffered device have true prop delay passing through various internal buffer stages but since the LSF is a switch type device, it doesn't have the tpd min max variation but only a typical.
    The LSF0204 may be used as a reference for min/max values.
  • hi Seasat,

    Are these GPIO or any interface operating at 65 MHz?
    What are the operating voltage levels/ translation requirement?
    You might consider using the SN74AXC8T245 which supports > 65Mhz for 3.3V translation. For 5V operation, consider SN74LVC8T245.

    Let me know.
  • hi Shreyas
    Thanks a lot
    CTM's requirement is fast 3-wire SPI bus(55-63MHzMhz),so must use auto bidirectional voltage translation from 1.8V -3.3V.
    Do you have any recommendations?
  • Hi Seasat,

    Why the LSF0108 8 channel device for the 3-wire SPI device? are there multiple devices?
    As I calculate, with a 15pF cap load, a 100ohm pullup resistor should achieve 95% of the final value within 4.5ns.
    With lower cap value, the R value can be increased proportionately. Having the high side close to the receiver device will reduce much of the parasitic cap as mentioned in the layout guidelines of the datasheet.
  • hi Shreyas

    Thanks a lot

    CTM has two sets fast SPI. So I promote 0108

    I will discuss with CTM about this delay value.

  • Thank you, Seasat.
    Please let me know once you find more.
    Please share the logic minute videos about the LSF with them to understand the architecture and translation working.