Part Number: SN74LVC125A-Q1
The project is composed by two stack of electronic boards the share an SPI Port. The 2 stacks are connected by a 40cm long cable. Below you can find an image to clarify the ideas.
My idea is to use SN74LVC125A-Q1 to improve the output strength of the MSP430F5438A to drive the cable. Also I'd like to use 2 SN74LVC125A-Q1, one for each stack.
I read the voltage levels and for me they are ok, but i would like confirmation from you if is this configuration acceptable.
Thanks for your work
This should work fine.
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In reply to Dylan Hubbard:
Thank you for your work.
I have a question:
In reply to Damiano Balzani:
Its dependent on the parasitic capacitance and system requirements. Longer cables will have more capacitance slowing the transition rate down.
Longer cables will have more capacitance slowing the transition rate down
ok. It's clear.
So, the Iout max gives the slew rate. Greater current corresponds to greater SR.
Can we assume that the transient capacitance charge is at constant current? Can we use this formula to calculate the rise time t = C * V / I ? and then use that time to evaluate the max frequency?
This FAQ should help here: https://e2e.ti.com/support/logic/f/151/t/718814?tisearch=e2e-sitesearch&keymatch=faq%3Atrue
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