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SN74LVC8T245: Undesired output behavior during power-up

Part Number: SN74LVC8T245
Other Parts Discussed in Thread: SN74AHCT541

Please help me with this issue my customer is having:

I’m using this level translator to go from 3.3V to 5V. 3.3V is on VCCA as the control inputs are referenced to VCCA and my control lines are 3.3V logic. 5V is on VCCB. The problem is at power up. 5V (VCCB) comes up first, then about 15ms later, 3.3V (VCCA) comes up. As 3.3V is rising (about 2ms rise time), the outputs on the B side pulse high for about 150us. This is very undesirable for my application. I’m using this device as an output only (A to B), so DIR is tied directly to VCCA. I need to control the output enable so OE is driven under normal operating conditions, but it is high impedance at power up, so OE has a 10K pull-up to VCCA, and that pin rises along with 3.3V as it comes up.

The datasheet explicitly states: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. So I thought what I did would ensure I get the high-impedance state during power up. What did I do wrong?

What can I do to fix this?

Does VCCA have to come up before VCCB? I didn’t see that in the datasheet. I would have to add a FET switch to control the 5V VCCB to turn on at a later time. This would be undesirable, but I could do that if that is what is needed. 

Would it help if OE was high before VCCA comes up? I could maybe use a resistor divider from the 5V on VCCB to provide a 3.3V pull-up instead of pulling it up to the 3.3V VCCA rail?

Thanks for your help!

Best regards,

Jim B

  • LVC inputs are overvoltage tolerant, so you can simply connect DIR and OE to 5 V. (But the device driving OE might not tolerate 5 V.)

    A buffer with TTL-compatible inputs like the SN74AHCT541 would work with 3.3 V input signals while being powered entirely from the 5 V supply.