I am currently testing the 500 kB capability of the CC2500 chip at 2.4 GHz using the SmartRF04EB board. I started with the ex_link2 example provided with tool to perform a simplex transmission at 500 kB. The chip was configured with the settings provided by SmartRF Studio for 500 kB. The 2 SmartRF04 EB are interconnected through a coaxial cable to avoid any external noise and multipath. The Tx noise level is set to get an RSSI between -30 to -50 dBm (the issue is actually the same). I modified the ex_link2 example to perform testing over many packets (60000). This basic test generates a few CRC errors while it should not do so (with an RSSI of -30 dBm, the SNR shoud be good enough to ensure a reliable transmission). This occurs for packet lengths of 10, 30 and 50 bytes. I have tried a large number of register configurations that somehow gave some improvement but never an error free transmission. I initially though that my code could be faulty. I ended up by testing the 500 kB transmission using the Packet test of the Smart RF Studio tool. I you select the 500 kB default configuration registers, set an infinite number of packets with length 30 B, a TX power for having an RSSI of -30 dBm, if you leave the code run (a very long time) to transmit more than 10000 packets, you will obtain a few errors. I have really tried many configurations (longer preamble, fixed packet length, CS, PQT, all timing and freq offsets configurations, different PA and AGC settings - what for over a cable !! - and always this error floor at good SNR.
In my understanding, this could be related to some mismatches between the Tx and Rx crystals of the CC2500EM. The errors are relatively systematic (same byte) - thus it is not related to noise. I implemented a software frequency offset compensation algorithm and when I put my finger on the crystal for quite a long time, I see the frequency offset drifting (this is normal as it is not a VCXO oscillator) and the PER increases. The issue is that the default settings for 500 kB proposes to set BSCFG.BS_LIMIT to 0, i.e. without timing compensation at 500 kB !! It may occur that due to phase noise in the crystals, we may have some bad behavior of the time synchronization. I tried many other configurations for the time sync., and indeed, it gives more CRC errors.
I am wondering if somebody has already tested thoroughly the 500 kB mode with the CC2500 chip. Have you ever met this issue of error floor and how did you solve it. Ultimately, could you confirm that the CC2500 is not reliable enough for 500 kB transmissions, at least without controlled oscillators without good phase noise ?
With my best regards,
The following link describes the same issue when using CC1101 at 500 kBaud. https://e2e.ti.com/support/low_power_rf/int-low_power_rf/f/162/p/197597/731798.aspx?Redirected=true
Increased AGCCTRL0.FILTER_LENGTH and setting AGCCTRL0.HYST_LEVEL = 3 seems to get rid of the "grey holes". Setting AGCCTRL0 = 0xF3 should hopefully show an improvement . Try also with AGCCTRL2 = 0xC6 instead of 0xC7 in combination with AGCCTRL0 = 0xF3.
Many thanks for providing an answer. Unfortunately, this parameter set does not change anything in the issue. Recall that the test is performed over a cable. I have checked that the RSSI value appended at the end of the faulty packets is correct and similar to those of good packets.
By the way, the link provided in the feedback does not seem to work. I would be very interested anyhow to have a deep look on it.
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