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CC2540 Hal UART DMA Stop bit problem
I am using the Hal UART DMA mode to send test data: 0x55, 0x55, 0x55 from CC2540.
When I monitor the TXD output on the oscilloscope, Instead of 1 stop bit, I found the stop bit duration is 2 bits actually.
And If I set UxUCR = UCR_STOP | UCR_SPB; (2 High stop bits), I found the stop bit duration is 3 bits actually.
I tried the 115200bps and 57600bps, they have the same problem.
Are there some thing wrong with the Hal UART driver? How can I set 1 stop bit precisely?
Thanks a lot!
After a few more tests, I found when CC2540 send data from UART continuously, It will add an idle bit after every stop bits.
I tried 2 stop bits, and the idle bit will after 2 stop bits.
I tried 9bit mode, and CC2540 will add the parity bit before stop bit, but 1 idle bit still after the stop bit.
I tried Low stop bit, and the idle bit also became Low.
I tried both the ISR mode and DMA mode, they both have this idle bit.
How can I remove this idle bit? Is this some kind of CC2540 USART hardware limitation?
Thanks for your attention and waiting for a solution.
why do you need to remove it? it may be overhead delay in processing the next byte
Because the receiving side wants 1 stop bit precisely.
How can I remove this overhead delay?
Can I fix this by modify the _hal_uart_dma.c file?
Thanks a lot.
There is a H/W bug in the UART peripheral that is adding an extra stop bit and there is no S/W workaround.
That's all I need to know:-)
Thanks for your help!
Is it possible to use UART with DMA support?
In the Software Developers Guide on page 29 it says:
HAL_UART_DMA – This symbol sets the CC2540/41 UART interface to use DMA mode, and should be either left undefined or set to 0. The CC2540/41 does not currently support this option.
Is it now supported or not?
Actually it became the preferred mode for using the UART as of the 1.2.1 release - the documentation must not have been updated.
Thanks for the fast reply!
I looked up in the 1.2.1 release documentation and ask for correction in future versions.
Is the H/W bug documented anywhere? Does it affect the Rx behavior too or does the stop bit behavior become asymmetrical (ie 2 tx stop bits, still only 1 rx stop bit expected)?
Yes, the H/W bug is documented right here in this thread de facto.
There is no adverse effect on Rx - the 'stop bit' is the idle state, so 1..N stops bits per byte by the transmitting H/W will be correctly interpreted by the CC254x UART receiver.
I am working with CC2530ZDK and trying to use the UART. I am using UART 1 alternative 2. I would like to send just 1 stop bit, but when I configure it for this, the CC2530 sends 2 stop bits, and when I configure it for 2 stop bits, it sends more then 2.
What should I do to fix this?
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