The chipset is OMAP3630+ WL1271+TQM679002. But the sensitivity of BT is only about -70dBm.
Single_slot sensitivity will pass the spec which is -70dBm, but the Multi-slot sensitivity always fail.
We have supply power of WL1271 by single battery, it seems has no use. The circuit has almost no match circuit, so we have no ideal about it.
Would you give us som advice? thank you!
At the beginning I would ensure that the fast clock source is appropriate and meet the WL1271 spec.
Since you are using the WL1271, the Trio chip set – WLAN and BT,
Could you let me know if the WLAN sensitivity is OK? This could clean up the fast clock.
Are you using Module design or discrete design?
It has a bad wifi sensitivity, too, which is only -81dBm at 11Mbps and -66dBm at 54Mbps.
We don't know the difference between Module design and discrete design. We layout the PCB of OMAP3630+WL1271+TQM679002 by ourselves, so we think it maybe a discrete design.
It appears that you design a discrete design, means component on board. Module is a integrated solution on package.
According the data you had shared it seems like you have HW issue, I would address the issue firstly to the fast clock phase noise.
Please make sure that the fast clock meets the WL1271 spec.
Does the PCB layout have 50 Ohm controlled impedance lines between WL1271, TQM679002 and the antenna/RF connector?
Sorry for delay reply.
The crystal we used is KDS DSG321G 38.4MHz. It seems meet the WL1271 spec.
We also exchanged the crystal with another phone which has good BT sensitivity. Our phone still had the same bad BT sensitiviy and another phone still has good sensitivity.
Would you give us more advice? thank you!
We used the 50ohm microstrip and attached the layout picture.
Would you help check it? thank you!
We also did the experiment to delete the TQM79002, and connected the RF cable to PIN3 of TQM79002 directly to test the BT sensitivity.
The performance has no improvement.
It looks like you have HW issue, it is reflected from WLAN and BT performance.
Since your design is based on discrete design (chip on board) and not module solution (integrate solution) it is complicate to comment without reviewing the schematic and layout.
There are appropriate WL1271 reference design and PCB design guideline to need to follow.
Can you please let me know how did you get the information of WL1271 so far?
Our project is a smart phone which use OMP3630 as AP and VIA module as Modem.
We got the reference design of WL1271 from VIA
Would you help us check the SCH and Layout if you think it maybe has some problem in them?
Yes, we will check the schematic and layout. Please email the files to email@example.com
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