Hello,
I tried to reproduce the bit coding for NFC 106k as described in the ecma 340 standard document Near Field Communication Interface and Protocol.
Therefore I transmitted one byte with the content 0x0F and had a look at the modulation pulses of the modified miller coding and the additional start and end condition of NFC.
The result can be seen below.
After a long time of RF-On the first pulse indicates the start condition. After this a correctly encoded one is transmitted 4 times (nopulse-pulse)
The first zero encodes as unmodulated (nopulse-nopulse). The following 3 zeros are also correctly encoded, as subsequent 0 should be encoded with pulse-nopulse.
Now comes the interesting part ...the standard tells:
End of Communication: ZERO followed by one bit duration without modulation
Shouldn't this be pulse-nopulse-nopulse-nopulse-RFoff?
I only see a ONE for the End condition followed by a very short nopulse followed by RF-Off.
Are there any registers that help me to manage the eof behaviour? Changes Register 0x02 TX Options Register have no effect on the signal waveform.
Am I missing something in the ecma standard?
Any help appreciated.
Regards Marco
TrfTxOptions14443B.eof_l0=1;
Marco -
Kostas told me you spent alot of time on the phone with him recently - so we shall have a response for you in the next days on this.
BR-
Josh
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Hello Josh,
Kostas asked me to provide further information for this problem, in special the register settings before I send the direct command for TX.
You can find the register settings at the end of this post.
Additionally I recognized that there are 2 types of "end of communication". (See attachment)
6746.TRF7970A_106k_EOF.pdf
I split up E (End of communication) into 2 parts: E1 =0; E2 = unmodulated; E=E1+E2
In one case E1 which should be 0 is 0 and E2 which should be an unmodulated carrier is RF off (I am not sure if the NFC spec also defines unmodulated for RF-Off).
In the other case E1 is "nopulse,pulse,very short nopulse" and E2 which should be an unmodulated carrier is RF off .
TrfRegisters Raw: 25 B9 00 00 C1 C1 20 0E 07 31 0C 04 XX 3E 00 40 00 00 00 00 00 00 02 XX 02 C0 00 00 00 00 00 XX 0x00 : ChipStatusControl = 0x25 stby = 0 direct = 0 rf_on = 1 rf_pwr = 0 pm_on = 0 agc_on = 1 rec_on = 0 vrs5_3 = 10x01 : IsoControl = 0xB9 rx_crc_n = 1 dir_mode = 0 rfid = 1 nfc_tgt = 1 nfc_mode = 1 nfc_emu = 0 nfc_br = 10x02 : TxOptions14443B = 0x00 egt = 0 eof_l0 = 0 sof_l1 = 0 sof_l0 = 0 l_egt = 0 Auto_SDD_SAK = 00x03 : HbrOptions14443A = 0x00 dif_tx_br = 0 tx_br = 0 parity2tx = 0 parity2rx = 00x04 : TxTimerControl1 = 0xC1 tm_st = 3 tm_length_h = 10x05 : TxTimerControl2 = 0xC1 tm_length_l = 1930x06 : TxPulseLength = 0x20 Pul = 320x07 : RxNoResponseWaitTime = 0x0E NoResp = 140x08 : RxWaitTime = 0x07 Rxw = 70x09 : ModulatorControl = 0x31 en_27MHz = 0 en_ook_p = 0 Clo = 3 en_ana = 0 Pm = 10x0A : RxSpecialSetting = 0x0C C212 = 0 C424 = 0 M848 = 0 hbt = 0 gd = 3 agcr = 0 no_lim = 00x0B : RegulatorControl = 0x04 auto_reg = 0 en_ext_pa = 0 io_low = 0 vrs = 40x0D : CollisionPosition1 = 0x3E ColUpperPart = 0 En_irq_fifo = 1 En_irq_crc = 1 En_irq_par = 1 En_irq_frame = 1 En_irq_col = 1 En_irq_noresp = 00x0E : CollisionPosition2 = 0x00 ColLowerPart = 00x0F : RssiLevels = 0x40 osc_ok = 1 rssi_x = 0 rssi = 00x10 : SpecialFunctions1 = 0x00 par43 = 0 next_slot_37us = 0 Sp_dir_mode = 0 RX_4_bit = 0 anticol_14 = 0 col_7_6 = 00x11 : SpecialFunctions2 = 0x00 irq_srx = 00x12 : Ram1 = 0x00 val = 00x13 : Ram2 = 0x00 val = 00x14 : FifoIrqLevels = 0x00 Wlh = 0 Wll = 00x16 : NfcLowFieldLevel = 0x02 Clex_dis = 0 Hash = 0 Rfdet_l = 20x18 : NfcTargetLevel = 0x02 Id_s = 0 Sdd_en = 0 Hi_rf = 0 Rfdet_h = 20x19: NfcTargetProtocol = 0xC0 Rf_h = 1 Rf_l = 1 FeliCa = 0 Pas_106 = 0 Pas_14443B = 0 NFCBR = 00x1A: Test1 = 0x00 OOK_Subc_In = 0 MOD_Subc_Out = 0 MOD_Direct = 0 o_sel = 0 low2 = 0 low1 = 0 zun = 0 Test_AGC = 00x1B: Test2 = 0x00 test_rf_level = 0 test_io1 = 0 test_io0 = 0 test_dec = 0 clock_suc = 00x1C: FifoStatus = 0x00 Foverflow = 0 Fb = 00x1D: TxLength1 = 0x00 Txl_h = 00x1E: TxLength2 = 0x00 Txl_l = 0 Bb = 0 Bbf = 0
in the meantime I made one step closer to the solution:
The NFC106 standard frame enforces one parity bit per byte. Thus the last bit is not a part of "end of communication", it is the parity bit for the byte. So it changes depending on the even or odd amount of ones in the byte. The "End of communication" does not even exist partly in this case.
I will only use standard frames - but just for interest, how do I tell the TRF to transmit a short frame (start-bit 0 to 6-end)?
Regards
Marco
is not the example of sending a short frame in ISO14443A seen directly as REQA and WUPA? (these are only commands in ISO14443-3 which use short frame, correct?)
We express this using the string:
0x8F ==> reset the FIFO
0x90 ==> send without CRC
0x00
0x0F ==> This covers the broken or short frame, where B0 indicates byte is not complete 8 bits, B1, B2 and B3 being set indicate # of bits = 7 (or short frame)
0x26 ==> REQA
or
0x52 ==> WUPA