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Question about TRF7970A register definition

Question about TRF7970A register definition

This question is answered
Cory huang
Posted by Cory huang
on Jun 29 2012 05:41 AM
Prodigy20 points

Hi all,

I'm using TRF7970A chip to bulid a NFC communication board. I'm confused about one TRF7970A register definition.

What conditions happened will makes "Irq_fifo" of "IRQ and Status Register (0x0C)" to be 1 or 0 ?

The spec's description is "Signals the FIFO is 1/3 > FIFO > 2/3", but I'm confused about this description.

Could some one anser me ?

Thanks

Cory

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  • Eddie LaCost
    Posted by Eddie LaCost
    on Jun 29 2012 08:36 AM
    Verified Answer
    Verified by Cory huang
    Expert3355 points

    Hi Cory,

    This bit will be set in the IRQ status register to indicate that there is data available in the FIFO.  Figure 5-20 through 5-25 in the datasheet show a good example of this bit being set and then reading out the data from the FIFO.  After sending the command, the first IRQ will indicate TX complete(0x80 in IRQ status register), followed by a second IRQ which indicates RX has started and data is available in the FIFO(0x60 in IRQ status register).  At this point, you should read the FIFO status register to determine how many bytes are in the FIFO, then read out the FIFO.

    TRF7970A datasheet: http://www.ti.com/litv/pdf/slos743c    

     

    Best Regards,

    Eddie LaCost

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  • Cory huang
    Posted by Cory huang
    on Jul 01 2012 21:23 PM
    Verified Answer
    Verified by Cory huang
    Prodigy20 points

    Hi Eddie,

    Thanks for your replying. I found setting "Adjustable FIFO IRQ Levels Register (0x14)" to different value will make different FIFO IRQ level.

    My NFC target could receive ATR_REQ from NFC initiator.

    Thank you

    Cory

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