TMS320x2808 + PWM symmetric mode + HRPWM = problem

Hello!

I tried to configure the PWM's symmetric mode with HRPWM but it did not work. In fact  I set "EDGMODE = HR_BEP" but it works like "EDGMODE = HR_REP". In other words, I see smooth movement of MEP in the oscilloscope but only for 1/2 of coarse step the other half did not end smoothly. My config is:

void HRPWM_Config(int iPwm, int period)
{
(*ePWM[iPwm]).TBCTL.bit.PRDLD = TB_IMMEDIATE; // set Immediate load
(*ePWM[iPwm]).TBPRD = period / 2; // PWM frequency = 1 / period
(*ePWM[iPwm]).TBPHS.all = 0;
(*ePWM[iPwm]).TBCTR = 0;

(*ePWM[iPwm]).TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
(*ePWM[iPwm]).TBCTL.bit.PHSEN = TB_DISABLE;
(*ePWM[iPwm]).TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
(*ePWM[iPwm]).TBCTL.bit.HSPCLKDIV = TB_DIV1;
(*ePWM[iPwm]).TBCTL.bit.CLKDIV = TB_DIV1;

(*ePWM[iPwm]).CMPCTL.bit.LOADAMODE = CC_CTR_PRD;
(*ePWM[iPwm]).CMPCTL.bit.LOADBMODE = CC_CTR_PRD;
(*ePWM[iPwm]).CMPCTL.bit.SHDWAMODE = CC_SHADOW;
(*ePWM[iPwm]).CMPCTL.bit.SHDWBMODE = CC_SHADOW;


(*ePWM[iPwm]).AQCTLA.bit.CAU = AQ_SET; // PWM toggle high/low
(*ePWM[iPwm]).AQCTLA.bit.CAD = AQ_CLEAR;

EALLOW;
(*ePWM[iPwm]).HRCNFG.all = 0x0;
(*ePWM[iPwm]).HRCNFG.bit.EDGMODE = HR_BEP; // MEP control on falling edge
(*ePWM[iPwm]).HRCNFG.bit.CTLMODE = HR_CMP;
(*ePWM[iPwm]).HRCNFG.bit.HRLOAD = HR_CTR_PRD;
EDIS;
}


3 Replies

  • Hi,

    Have you run HR-PWM mode before in other applications or configurations?  If not, did you enable the HR-PWM clock and configure SFO() as well?

    Regards,
    Daniel

  • In reply to Daniel Chang:

    Yes, I tried  the hrpwm_sfo_v5 example from sprc191 and it works fine. In fact I changed this example in order to have the subject config. Therefore I think  there is all required initialization for HRPWM mode...

  • In reply to Andrey K:

    If you modified the provided example to use Up-Down count and BE control, it should function correctly.  I took a look at your configuration and did not see anything obvious.

    Can you try explaining what you are seeing?  I do not completely understand your first post.

    Regards,
    Daniel