I'm using C2808 as a digital controller with its EPWM configured as PWM signals. I configure the EPWM deadband as "DB_ACTV_HIC" so EPWMxA and EPWMxB are in pairs. However, I find there maybe two problems in this mode:
1) If I click "halt" in emulation, the EPWM still stop work but still keeps output as "complement output" - i.e, one is high, the other is low. But this may damage my hardware. Could anyone tell me a way to make both of them "output low" in HALT?
2) Assuming an interrupt comes while the EPWM A/B pair is working normally, how shall I quickly stop the EPWM with both of them "output low" in the interrupt? I tried to disable the EPWM clock but it seems not work. Can anyone help me on this?
Thank you very much in advance,
I have the exact same question.
1) Depending on your needs, you could configure the PWMs in FREE-RUN mode. This is done in the PWM TBCTL register. This will allow the PWM timers to continue to run while the program is paused and prevent your PWMs from getting stuck constantly high/low.
2) Once you are in the interrupt, you could try using a continuous SW force, using the AQCSFRC register. Depending on the interrupt source, you could potentially configure your PWM modules to automatically trip and go low.
Thank you for reminding me this. I'm referring to SPRU791F which I think is similar to SPRUGE9. Maybe I didn't understand trip-zone part well. I'll try to look at it again.
Regarding to question 2), I noticed the CCS debug tool provides an option as "halt at program termination (requires setting a breakpoint)" So I'd like to know if there is a way to make the program stop from "free run" to a defined "breakpoint" as I defined when I click "halt". Or if that option doesn't mean like what I imagine, Pls correct me.
Sorry, I did not see that you are using C2808. That is a different device than F2802x.
SPRU791 is the correct user guide to refer to. Do not use SPRUGE9.
Regarding 2) I am not sure if you can pre-set a location to "halt" at. You can try asking in the CCS Support Forums.
What you can try is setting the breakpoint when you want to halt. This way the device will stop at the breakpoint like it would for any regular breakpoint. Another option is to try setting the breakpoint ahead of time, but disable it during run. When you want to halt, you can re-enable the breakpoint.
You can also hard code a breakpoint in software by using the
You can also hard code a breakpoint in software by using the
To add on to what Kris said, you could do what he suggested inside of an IF statement. That way, if you want to halt, you can toggle a variable during run-time to trigger the halt.
Daniel, Kris, Thank you so much for your suggestions.
According to my findings, option (1) does not always work. In ePWM asymmetric mode, the ePWM module will count up or down to the end of a switching cycle, then the ePWMxA and ePWMxB pins may be manipulated per the AQCTRLx registers. In ePWM symmetric mode, the TMS320F2809 stops when the TBCTR = TBPRD, which is right in the middle of the ePWM switching cycle. As a result, one of the ePWMx pins is pulled logic HIGH and the other logic LOW.
I have no solution for this problem on the TMS320F2809 when using the ePWM modules in symmetric mode. If you hear of one, please let me know.
Yes, I agree with you. Option(1) doesn't always work. I think setting EPWM TZ interrupts(either by HW or software) can force both outputs low. So maybe you can set an externally "trig signal" to force PWM low.
Violet is on the right path. You can configure these for a ONESHOT trip and force the outputs to a known state. Setup some sort of variable in your main() loop which you can set from the watch window:
if(about_to_halt == 1)
EPwm1Regs.TZFRC.OST = 1;
EPwm2Regs.TZFRC.OST = 1;
asm(" ESTOP0"); // Automatically halts the emulation, then you can clear your OST trip flags afterwards
// Clear trip flags here so when you resume emulation PWM outputs are active again
Thanks Kris, Violet.
This solution has a ring of familiarity to it. It appears I cannot deassert the ePWMxA and corresponding ePWMxB pins during a normal emulation halt; it must be accomplished using a variable which can be updated in a watch window while CCS is operating in a real-time mode of execution.
So why hasn't SPRU791 table 4-4 (FREE/SOFT bits) been updated to reflect this? Even the latest version associated with the Piccolos, SPRUH18C, still reflects that ePWM modules can configure FREE/SOFT to '01' to allow the module to stop after an entire symmetric switching cycle when an emulation halt has been issued.
This is correct. On later devices we have added an EMUSTOP trip which can set the PWMs to a known state on an emulation halt. However, for this device this is a workaround to accomplish the same result.
The FREE_SOFT bits are not intended to force the PWMs to a known state. It may be able to be used this way depending on where your PWMs are toggled, but if your PWMs are configured to be complimentary this will not provide you with the functionality to set them both low on emulation halt. The benefit of these bits are you can maintain the desired duty cycle / PWM relationships before and after an emulation halt.
Thanks Kris. My main concern was that SPRUH18C (the latest peripherals user's guide associated with the TMS320F28069) does not reflect how FREE/SOFT affects the ePWM channels at the end of a PWM switching cycle.
Not sure I'm following the problem with the description of these bits. Can you elaborate?
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