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TI Home » TI E2E Community » Support Forums » Microcontrollers » C2000™ Microcontrollers » C2000 32-bit Microcontrollers Forum » F28069 PWM CLK question
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    F28069 PWM CLK question

    This question is answered
    MPiot
    Posted by MPiot
    on May 11 2012 15:36 PM
    Prodigy110 points

    Hi,

    I am using the F28069 controlCARD with the docking station and I am having some strange issues with Example_2806xClaAdcFir from ControlSuite (latest version).  The program runs, but ePWM1 produces a 10kHz waveform instead of a 20kHz one as discribed in the example comments.  It appears that the PWM module clock is running at 20MHz when it is programmed to run at 40MHz.  I did not change any of the example code, and I checked the registers for ePWM1 and they appear to be set correctly:  namely TBCTL = 0xC080  which should set TBCLK = SYSCLKOUT / 2.

    I have checked the system clock using XCLK and have confirmed that it is running at 80MHz.  Any insite into why the PWM clk appears to be half its expected value would be appreciated.

    Thanks,

    Mark

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    • Kris Parrent
      Posted by Kris Parrent
      on May 11 2012 15:43 PM
      Expert6005 points

      Mark,

      Can you verify which version of the example you are using in controlSUITE?  Inside the f2806x folder there will be a number of v1xx folders.  Please let me know which one the example resides in you are using.

      I know you said latest version, but just double checking :)

      Kris

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    • MPiot
      Posted by MPiot
      on May 11 2012 15:51 PM
      Prodigy110 points

      I am using the example from the v130 folder

      Mark

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    • Kris Parrent
      Posted by Kris Parrent
      on May 11 2012 15:54 PM
      Verified Answer
      Verified by MPiot
      Expert6005 points

      Thanks Mark,

      It looks like the comment is just wrong.  Check out the equation for up count mode on pg 249 of the 2806x TRM:

      http://www.ti.com/lit/ug/spruh18c/spruh18c.pdf

      If you plug in the numbers used in the example it comes out to 10 KHz (with TBCLK at 40 MHz).  I will make sure the comment gets corrected in the next revision.  Thanks for pointing this out.

      Kris

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    • MPiot
      Posted by MPiot
      on May 11 2012 16:07 PM
      Prodigy110 points

      Thanks,

      forgot that it toggled when the counter equals zero in this example, everything works as it should.

      Mark

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