I use the trip zone module on the F28335 to stop/enable the PWM signals, manually of if an error occurs. When I force a OSHT trip the interrupt is triggered, but if a trip occurs on TZ1 the interrupt is not invoked. I configure GPIO12 as follow:
void ConfigTZ(){
EALLOW; GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0; // Enable pull-up on GPIO12 (TZ1) GpioCtrlRegs.GPACTRL.bit.QUALPRD1 = 0x00; // enable input qualification GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 1; // (TZ1) synch qualification GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1; // Configure GPIO12 as TZ1 EDIS;
// enable cycle by cycle trip EALLOW; // Trip zone registers are EALLOW protected EPwm1Regs.TZSEL.bit.OSHT1 = 1; // Trip zone 1 used for this sub module EPwm1Regs.TZCTL.bit.TZA = 10; // Force PWMA low EPwm1Regs.TZCTL.bit.TZB = 10; // Force PWMB low EPwm1Regs.TZEINT.bit.OST = 1; // enable trip zone interupt EDIS;
}
void PWMAEnable(void){ if(EPwm1Regs.TZFLG.bit.OST) { EALLOW; EPwm1Regs.TZCLR.bit.OST = 1; EPwm1Regs.TZCLR.bit.INT = 1; EDIS; }}
// disable all the PWM channels by forcing a one-shot trip #define PWMADisable() { \ EALLOW; \ EPwm1Regs.TZFRC.bit.OST = 1; \ EDIS; \ \ }
I'm I missing something obvious?
Ivan,I haven't fully looked through your code, but I believe that you want to write "2" (10 in binary) to EPwm1Regs.TZCTL.bit.TZA and EPwm1Regs.TZCTL.bit.TZB. Thank you,Brett
Brett,
Thank you for spotting that, luckily 10 decimal is 1010 binary so the register was still ok. changed to 0x2, but still get the same issue. Looking at p.3 of spraar4.pdf it seems like the async trip occurs but the sync block is not triggering the OSHT trip latch, which will trigger the interrupt.
Regards
Ivan
Ivan,
If I understand your problem correctly, you are receiving the interrupt but are not seeing any output change on the PWM, correct?
I believe you need to take a look at
EPwmxRegs.TZCTL.bit.TZA = TZ_FORCE_HI; EPwmxRegs.TZCTL.bit.TZB = TZ_FORCE_LO;
to set the state of the PWM output in the event of a trip.
Kris
Correction.. I overlooked the TZCTL. These should be fine. Please verify the problem though :)
Kris,
I get it the other way around. The output of the PWM signals goes low as intended, but I don't get the interrupt. I get the interrupt if I do a software forced trip.
Thanks Ivan,
Can you post your PIE configuration?
Please see the code take-outs below, this is the sections that I used tho setup the interrupt. Please let me know if you need more.
EALLOW; // this is needed to write to eallow protected registers
PieVectTable.EPWM1_TZINT = &epwmTZ1_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// enable trip zone interrupts in the pie PieCtrlRegs.PIEIER2.bit.INTx1 = 1;
// enable cpu int2 which is connected to the pwm trip zone blocks // enable cpu int3 which is connected to the pwm blocks IER |= M_INT2; IER |= M_INT3; EINT; ERTM; // Enable Global realtime interrupt DBGM
Excellent, this looks good. How long are you holding GPIO12 low when you are testing for the trip interrupt? What you may want to try is setting GPIO12 to async by changing your GPAQSEL to:
GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3; // Asynch input GPIO12 (TZ1)
I've got it down for about 100us. I tried the async option but still have the same problem. I have more than one source tripping TZ1. In the interrupt I want to decode it from the GPIO pins.
In your original post, it looks like you are using this as a ISR, correct?
However, in your PIE configuration you set the PWM1_TZ interrupt to a different function. Am I misunderstanding the use of the PWMAEnable() function?
Second question, can you tell me if when GPIO12 trips the PWM output, if you look at the EPwm1Regs.TZFLG.bit.OST register, is this flag set? If this is set, is the EPwm1Regs.TZFLG.bit.INT set?
I use void PWMAEnable(void) to enable the PWM signals via a command through the SCI port. I call the function interrupt void epwmTZ1_isr(void) when a TZ1 interrupt occurs. The idea is that this interrupt is triggered either by software or a low on TZ1. The enable function clears all the flag so more interrupts can occur. When the PWM is running I must be stopped by either a command:
void PWMADiable(){
EALLOW;
EPwm1Regs.TZFRC.bit.OST = 1;
EDIS;
of a low on TZ1(GPIO12).
The issue is that a low on TZ1 doesn't trigger the interrupt, but the PWM signals are forced low.
Both the flags are set when when GPIO12 trips the PWM.
Thanks for the explanation. Hmm... if both of these flags are set that implies that the TZ has been latched (as seen on the PWM output) and an interrupt signal sent to the PIE. How are you verifying that your ISR is not being reached? Breakpoint, software, etc?
I'm toggling a GPIO pin and checking it on a scope. I'll bash through the code some more to see if I can find something I'm missing.
Might be worth checking the status of the PIE flags as well, just to make sure there is not a previous interrupt that did not get acknowledged or similar. I would also recommend just setting a breakpoint on the first command of the ISR for debug purposes.