I'm using the F2812's McBsp Transmitter in FIFO mode. I am seeing an intermittent issue where I lose outgoing data. . When it occurs, 32 bits go missing from the ouptut stream, and the rest of the data in the frame arrives early by 32 bits. So it sounds very much like the overwrite condition as described in 1.5.3 of the McBsp Reference Guide - data is written to DXR1 before the previous value is shifted to XSR1. However, in FIFO mode, DXR1 should be the top of the FIFO stack, and the transfer into XSR ought to be under control of the FIFO circuit, so my code's writing to DXR1 should not cause problems, right?
The real question is what could cause an overwrite error in FIFO mode? Or if it's not an overwrite error - what could cause 32 bits to go missing from the datastream?
(I know I'm not overflowing the FIFO, and I know it's being filled long before the transmission starts)
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