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About the Solar Liberary Function of C2000™ Solar Inverter Development Kits

Other Parts Discussed in Thread: CONTROLSUITE

I'm interesting in Solar Inverter Development Kits

If i want to know more about  the Solar Liberary Function of C2000™ Solar Inverter Development Kits

where can find more about  Solar Liberary Function's information ?

  • Jim,

    All the information is in controlSUITE v2.8.0,

    Please update and you will find it under,

    controlSUITE\libs\app_libs\solar

    regards

    Manish Bhardwaj

  • Hi Manish,

    I have some problem want to ask .

    I find those data in controlSUITE, but when I want to open the project 

    It shows this error

    what should I do 

  • jHi,

    There is an error in the Controlsuite Desktop,we do not have any template projects for the solar library, it's being used only by the development kits.

    Please try to open it from the Kits-> Solar Explorer -> PV Inverter F2803x project, (currently the description reads PV emulator, This should read PV inverter, we will fix this in the next update)

    Or alternatively you can follow the user guide that describes how to open the projects,

    ,controlSUITE\development_kits\SolarExplorer_v1.0\SolarExplorer_PVInverter_F2803x\~Docs

    Regards

    Manish Bhardwaj

  • HI

    I saw the SolarLib_float.pdf,

    but I  have some question about the content

    first, i couldn't understand the section explains how to use this module

    it's means I need to ceate a new project then add the new "Main.c" file??

    Regards 

  • Jim,

    The solar library documentation is to be used in conjunction with the sample project in this case the sample projects are  found here,

    controlSUITE\development_kits\SolarExplorer_v1.0

    Adequate documentation is provided in the library document to explain the module algorithm and software interface,

    the library documentation does not include steps on starting a new project, that is not the objective of the document.

    Regards

    Manish Bhardwaj

  • HI, Manish:

    About the spll provided by TI , I have ported the algorithm  to my pv inverter project, and it works well.

    But I want to know if the calculation of  theta[0] in the algorithm is OK? is the range of theta[0] between 0 to 2PI?

    TKS!

  • HI, Manish:

    Are you online? I need your help.

  • Any body can help me ?

  • Wei,

    The PLL code does not directly use the theta value as it uses DCO for the sine and the cos values,

    The PLL code has the following snippet:

    if(spll_obj->sin[0]>(0.0) && spll_obj->sin[1]<=(0.0))
        {
            spll_obj->theta[0]=(0.0);
        }

    As the condition is applied to sin value going from negative to positive, the theta range is from zero to 2*pi,

    Regards,

    Manish Bhardwaj

  • dear Manish Bhardwaj,

    (1) in the pll code has the following snippet:

    v.theta[0]=v.theta[1]+SPLL_Qmpy(v.wn,SPLL_Q(0.00001591549));

    so, the range of theta[0] is from 0 to 2,  not 2*pi, right ?

    (2) for above code, why not v.theta[0]=v.theta[1]+SPLL_Qmpy(v.wo,SPLL_Q(0.00005));

    if write like this, i think that is the real time angle of grid voltage, and the range is from  zero to 2*pi, right?

  • Ok,

    Well i had modelled the PLL in matlab first so in that the range was kept from o to 2 * pi,

    when using fixed point maths it's better to scale everything from 0 -> 1 , so to keep this you multiply the delta theta by 1/2*pi,

    Now initially the PLL calling frequency was 10Khz and hence the 0.0000159, this should be replaced with delta_T/(2*pi) or something,

    Sorry for the confusion, it will be corrected in the next release of the software,

    Regards

    Manish Bhardwaj

  • Dear Manish Bhardwaj:

    I really understand you. 

    so, do you think my code "v.theta[0]=v.theta[1]+SPLL_Qmpy(v.wo,SPLL_Q(0.00005));" right or not ?

    in my practical test, v.theta[0] is not the real time grid voltage angle if computing based on the above equation.

    I suspect that in your spll algorithm, we can get sin[0] and cos[0], but we can not get theta[0], maybe this is

    relevant to the algorithm.

    I look forward to your reply and new software release.

  • Wei the correct one is

    spll_obj->theta[0]=spll_obj->theta[1]+(spll_obj->wn*(0.00000795));

    or you can do

    spll_obj->theta[0]=spll_obj->theta[1]+(50*(0.00005));

    i will recommend the latter,

    Note as wo is 2*pi*f the delta in the first equation is 0.00005/(2*pi)

  • OK, you recommend the equation :

    spll_obj->theta[0]=spll_obj->theta[1]+(50*(0.00005));

    for the frequency equals to 50Hz, it is maybe OK,

    but if grid frequency changes to 48Hz, 49Hz,51Hz, 52Hz,

    the theta[0] does not equal to the angle of grid.

  • You are right,

    Use this then, wo is the frequency feeding the VCO and shall adapt to the grid conditions,

    spll_obj->theta[0]=spll_obj->theta[1]+(spll_obj->wo*(0.00000795));

    regards

  • Hi Manish,

    I was trying the SPLL module you wrote on a Piccolo development board, and I wanted to find the phase difference between grid voltage (input) and the PLL output  in real time.

    I had a 60Hz sine wave as input, and I run the spll function in an ADC ISR ( triggered every 0.00005 second).

    According to the document, I think the output of the Notch Filter is equal to (Vgrid * Phase_difference)/2;

    So the Phase_difference = ( Notch_output * 2 ) / Vgrid .

    I monitored Notch_output which is spll1.ynotch[0] , and the result was varying between -0.2 to 0.2

    Since Vgrid is 1.52 here, it means the phase difference is changing between -0.333 rad to +0.333 rad ( or -19 degrees to +19 degrees) ?

    That doesn't look right to me, because ideally the phase difference must be very small if it is locked.

    Please help me with this and let me know if you need more information on how I did the testing.

    Thank you,

    Kelvin

  • Hi Manish,

    Could you help me with this ?

    Thank you,

    Kelvin

  • Kelvin,

    The Vgrid is 1.52 what do you mean by this?

    The notch filter is 1st order notch, however it will attenuate quite a lot of the 2w, You can alternatively try the following coefficients,

    [B_notch,A_notch]=butter(1,[110*2/Fs 130*2/Fs],'stop')

    B_notch =

        0.9969   -1.9923    0.9969


    A_notch =

        1.0000   -1.9923    0.9937

    where Fs=20000

    I do agree it will not attenuate everything but should not be as large as you are mentioning,

  • Hi Manish,

    Thank you for your reply.

    1. 'Vgrid = 1.52' means the amplitude of my input sinusoial signal is 1.52 v .(sine ADC only takes 0 to 3.3v as input).

    2. About the new coefficients you gave above for the notch filter, I think they are the same as the existing coefficients in the code, right?

    More questions:

    3. Is this SPLL module able to handle frequency changes in the input (or source, or grid voltage). If it is, what is the range of the frequency changes?

    4. Finally, I hope you could explain a little bit more about the sine and cosine integration formula.

    (i.e. Why was it calculated this way ? Which method did you use?)

     

    Thank you so much,

    Kelvin

  • 1. Are you subtracting the offset before you enter the value to the PLL block, PLL block should see +-0.5 signal to avoid any overflow/underflow etc.

    2. Yes the coefficients are the same,

    3. Yes the PLL will be able to handle changes in voltage and grid frequency to some extent. The PLL performs well for 50Hz +-2-3Hz and 60Hz +-2-3Hz. For bigger frequency difference the notch will stop working and the error on your lock will be quite large. 

    4.  the sin and cos integration formula was used to save cycles, typically sin and cos can cost upto 70-80 cycles. The formula is simple integration formula

    new sine value = previous sin value + step * slope

    slope in case of a sine wave is w*cos(prev), and for cos is -w*sin(prev)

  • Hi Manish,

    Thank you so much for your help.

    1. Yes, I am subtracting the offset before I enter the value to the PLL block.

    2. About the phase difference detection, I output the spll module result (sin[0]) through an ePWM and a RC low-pass filter to the scope. The phase difference between the input sine wave and this output sine wave is about 9 degrees. I think it is reasonable since the low-pass filter causes phase delay. (By the way, I don't have a DAC). The problem is it didn't give a reasonable result if I watched it in CCS Expressions. I need to use this information (the phase difference) to determine what action I have to take in my system. I don't know if you have any suggestion on this?

    Thank you,

    Kelvin

  • Well PWM and RC filter is PWM DAC,

    I'll recommend to plot the sampled ADC value on the PWM dac as well and then compare the locked angle, both on PWM DAC.

  • Hi Manish,

    I tried the spll module you developed, and it worked well with the sine output, meaning the sine output is locking the phase of the AC input.

    The problem is that the angle ' theta[0]' is between 0 to 1 , instead of between 0 to 2pi, after I modified to

    spll_obj->theta[0]=spll_obj->theta[1]+(spll_obj->wo*(0.00000795));

    --------- The AC input is 60Hz, and the spll is triggered at 20K Hz

    What is the meaing of   ( spll_obj->wo*(0.00000795) )   ?

    If Wo= 2*pi*f,   and  0.00000795 is calculated by delta_t / (2*pi), then the formula above becomes   '  frequency * delta_t '   or delta_t / period '  ?

    Thank you

  • Yes that is exactly what it means

    new theta = theta + freq* t;

    in which case theta will go from 0 to 1 in a frequency period

  • Hi Manish,

    I am wondering what stop band you used to calculate the Notch filter coefficients (in the code) for 50Hz center frequency ? Is it still based on 20K Hz sampling frequency ?

    because if I try

    [B,A]=butter(1,[95*2/20000 105*2/20000],'stop')

    It doesn't give me the coefficients as you used in the code.

     

    Thank you

     

  • Hi Manish,

    Did you update the SPLL_1ph.h file and released the new library file? If not, do you have an updated file for a floating point dsp that I can use? Please let me know.

    Mithat

  • The corrected version v1.1 has been released, update your control suite to get the latest version