Concerto - M3 WatchDog

I am facing same problem. Not getting interrupt of watchdog. Due to that my system is resetting at (2*watchdog set time).


/*****************************************************/
////************WATCHDOG FUNCTION *****************////
// watch dog 0 has clock source as system clock
// watchdog1 has clock source as oscl clock
SysCtlPeripheralEnable(SYSCTL_PERIPH_WDOG0); //Watch dog enable for Hang Issue

// watchdog counter reset
WatchdogReloadSet(WATCHDOG0_BASE, 375000);// Reload of watchdog with 20000000 * 6.6667 * 2ns = 266ms
//
WatchdogUnlock(WATCHDOG0_BASE);
// Enable watchdog reset generation
WatchdogResetEnable(WATCHDOG0_BASE);
IntRegister(WATCHDOG0_BASE, WatchdogTimerHandler);
IntEnable(INT_WATCHDOG);// Enable Interrupt of watchdog
// Enable watchdog
WatchdogEnable(WATCHDOG0_BASE);
// Lock the Watchdog0
WatchdogLock(WATCHDOG0_BASE);
//Interrupt registration for watchdog



@125us, I am resetting it,

if(Mcore.adj.SPARE0121 == 5){
FRAM3_EN;
}
else{
WatchdogUnlock(WATCHDOG0_BASE);
WatchdogReloadSet(WATCHDOG0_BASE, 375000);
WatchdogLock(WATCHDOG0_BASE);
}
when i set spare0121 = 5, it should go in watchdog interrupt.


@ISR

void WatchdogTimerHandler (void)
{
CounterWD++;
FRAM3_DIS;
WatchdogIntClear(WATCHDOG0_BASE);

}




My counter is not incrementing.
and GPIO -> FRAM 3is not changing when it comes in interrupt.


Umang