[F28027] SOCFRC causes fail during ADC offset self cal

Looking over the code, everything looks fine.  Are you sure that the EALLOW bit is set before this function is called?  The INTSEL1N2 registers are EALLOW protected (as are some of the other registers being accessed in the function).  

I didn't follow how calling the adcOffsetSelfCal() related to your issue.  Did the issue begin after you put the function call in your code?  

Hi Devin

Thanks for your response. My adcInit() calls adcOffsetSelfCal() which itself calls two functions adcChanSelect() and adcConversion, the 3 of which are direct from the example files. The issue began after I started trying to call adcOffsetCal() from my adcInit()

Though I did have problems with my multiple EDIS; being called (thanks for mentioning that) this doesnt seem to have solved the problem.

I have noticed that If I comment out the CPU enabling of the interrupt generated by the EOC of my regular ADC readings (i.e. at the end of adcInit()) then the ISR_ILLEGAL is not raised... however this leaves me with no interrupt for my actual ADC results... So I guess i must have some error with my interrupt occurring?

Below I have included my adcInit(), adcOffsetSelfCal() and adcChanSelect() functions:

void adcInit(void) {
	// Setup ADC A1, B1 & B2 to be triggerd by at 10kHz PWM3B 
	// ADCs use round robin, so ADC B2 is last and when it's
	// finished it triggers ADC interrupt 1 (ADCINT1) 
    EALLOW;
	AdcRegs.ADCCTL1.bit.ADCREFSEL = 0;	// Use internal bandgap
	AdcRegs.ADCCTL1.bit.ADCBGPWD = 1;	// Power up band gap
	AdcRegs.ADCCTL1.bit.ADCPWDN = 1;	// Power up rest of ADC
	AdcRegs.ADCCTL1.bit.ADCREFPWD = 1;	// Power up reference
	AdcRegs.ADCCTL1.bit.ADCENABLE = 1;	// Enable ADC
	DELAY_US(1000);						// Wait 1ms for ADC to power on
	adcOffsetSelfCal();					// Calibrate ADC zero offset
	
	AdcRegs.ADCCTL1.bit.INTPULSEPOS	= 1;// Create interrupt pulses 1 cycle prior to result output latch
	
										// SOC0 must be read then discarded as part of workaround for first sample errata
	AdcRegs.ADCSOC0CTL.bit.CHSEL = 9;	// Convert ADC-B1 (CH1) when SOC0 is recieved
	AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 9;	// Set SOC0 to be triggered by ADCTRIG9 (ePWM3, ADCSOCA),
										//  due to round robin, this will be first conversion
	AdcRegs.ADCSOC0CTL.bit.ACQPS = 6;	// Set SOC0 S/H window to 7 ADC clk cycles (6 ACQPS plus 1)

	AdcRegs.ADCSOC1CTL.bit.CHSEL = 9;	// Convert ADC-B1 (CH1) (I_pk) when SOC1 is recieved
	AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 9;	// Set SOC1 to be triggered by ADCTRIG9 (ePWM3, ADCSOCA),
										//  due to round robin, this will be second conversion
	AdcRegs.ADCSOC1CTL.bit.ACQPS = 6;	// Set SOC1 S/H window to 6 clk cycles (117ns)
	
	AdcRegs.ADCSOC2CTL.bit.CHSEL = 10;	// Convert ADC-B2 (CH2) (V_dc) when SOC2 is recieved
	AdcRegs.ADCSOC2CTL.bit.TRIGSEL = 9;	// Set SOC2 to be triggered by ADCTRIG9 (ePWM3, ADCSOCA),
										//  due to round robin, this will be third conversion
	AdcRegs.ADCSOC2CTL.bit.ACQPS = 6;	// Set SOC2 S/H window to 6 clk cycles (117ns)

	AdcRegs.INTSEL1N2.bit.INT1SEL = 2;	// EOC2 causes ADCINT1
	AdcRegs.INTSEL1N2.bit.INT1E = 1;	// Enable ADC interrupt 1
	PieVectTable.ADCINT1 = &adc_isr;	// Map ADCINT 1 to ADC ISR
	EDIS;
	
	AdcRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;// Clear ADCINT1 flag
	
	setPwm(&EPwm3Regs, 10000, 0, 0);	// Set ePWM3 time-base to 10 kHz
										// Set ePWM3B event trigger to ADCTRIG9 (ADCSOCA)
	EPwm3Regs.ETSEL.bit.SOCAEN = 1;		// Enable SOC on A group
	EPwm3Regs.ETSEL.bit.SOCASEL = 1;	// Select SOC from ZRO
	EPwm3Regs.ETPS.bit.SOCAPRD = 1;		// Generate pulse on first event
	
	PieCtrlRegs.PIECTRL.bit.ENPIE = 1;	// Enable the PIE block
	PieCtrlRegs.PIEIER10.bit.INTx1 = 1;	// Enable PIE Group 10 - INT1
	IER |= M_INT10;						// Enable CPU INT1
}

void adcOffsetSelfCal(void) {
   // This function re-calibrates the ADC zero offset error by converting the VREFLO reference with
   //  the ADC and modifying the ADCOFFTRIM register. VREFLO is sampled by the ADC using an internal
   //  MUX select which connects VREFLO to A5 without sacrificing an external ADC pin.
    Uint16 AdcConvMean;
    //EALLOW;
    AdcRegs.ADCCTL1.bit.ADCREFSEL = 0;					//Select internal reference mode
    AdcRegs.ADCCTL1.bit.VREFLOCONV = 1;					//Select VREFLO internal connection on B5
    adcChanSelect(13);									//Select channel B5 for all SOC
    AdcRegs.ADCOFFTRIM.bit.OFFTRIM = 80;				//Apply artificial offset (+80) to account for a negative offset that may reside in the ADC core
    AdcConvMean = adcConversion();						//Capture ADC conversion on VREFLO
    AdcRegs.ADCOFFTRIM.bit.OFFTRIM = 80 - AdcConvMean;	//Set offtrim register with new value (i.e remove artical offset (+80) and create a two's compliment of the offset error)
    AdcRegs.ADCCTL1.bit.VREFLOCONV = 0;					//Select external ADCIN5 input pin on B5
    //EDIS;
}

static void adcChanSelect(Uint16 chNo) {
	// This function selects the ADC channel to convert by setting all SOC channel selects to a single channel.
	//  * IMPORTANT * This function will overwrite previous SOC channel select settings
    AdcRegs.ADCSOC0CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC1CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC2CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC3CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC4CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC5CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC6CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC7CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC8CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC9CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC10CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC11CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC12CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC13CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC14CTL.bit.CHSEL = chNo;
    AdcRegs.ADCSOC15CTL.bit.CHSEL = chNo;
}

If I power down the ADC core  and then power it up again after the self cal and before the ADC is setup for normal use then there appears to be no errors.

However, having added all ADC registers to the watch window there appears to be no difference between Initialising with the self cal or without other than the ADCBUSYCHAN bits in ADCCTL1... these just indicate that some channel has been converted (in the selfCAL()) and dont actually indicate that anything further needs to happen right?

Ta

I don't think you want to have the (PIE) Interrupt enabled while you run the self calibration function?  The ping-pong sampling contained inside the function does not use the PIE or ISR and it keeps the ADC busy.  I think you want to disable the PIE ADC ISR, call the self cal, then re-enable?