The Stellaris Cortex-M3 devices have Flash that can be erased per 1kB block and written to by an API function from any code. Is this still the case with the Cortex-M3 part of a Concerto device, e.g. F28M35H52C1? Or is it strictly sectored as in the C2000 series and can only be erased and programmed from functions running in RAM?
Does the Ethernet BootP protocol also work for first-time-programming or is the Ethernet boot-mode only used to load a loader application to RAM?
Walter
Walter,
I can answer the second question. I'll let someone else from the team answer the first one or you can open a new thread after closing this one for the first one alone.
Walter Saegesser Does the Ethernet BootP protocol also work for first-time-programming or is the Ethernet boot-mode only used to load a loader application to RAM?
All boot modes on Concerto as of today support downloading application to RAM. Boot loaders on Concerto doesn;t suppport flash programming, customers have to write their own loader that does the flash programming using the flash programming API.
Best Regards
Santosh
Sizes of the sectors of F28M35x Flash is given in datasheet. Please refer to datasheet.
F28M35x Flash is divided in to sectors of sizes 16K and 64K.
F021 Flash API can be executed only from RAM.
Thanks and regards,
Vamsi
Thanks, Santosh and Vamsi, for your answers.
In the meantime I have hunted out the Flash API document. I found a note there (page 10):
The F021 Flash API library cannot be executed from the same bank as the active bank selected for the API commands to operate on. On single bank devices, the F021 Flash API must be executed from RAM.
As the Concerto has two independent Flash banks, I conclude that the Master should be able to program the Control from Flash and vice versa. The API function "Fapi_setActiveFlashBank()" seems to be applicable to Concerto. Am I wrong with this assumption?
Regards
In F28M35x, Master subsystem Flash bank is accessible only to Master core M3 and Control subsystem Flash bank is accessible only to Slave C28x core.
Master can not program/erase C28x Flash bank and C28x core can not program/erase M3 Flash bank.
Hence for F28M35x devices, I mentioned in earlier post that Flash API should be executed from RAM.
Thanks and regards,Vamsi