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TI Home » TI E2E Community » Support Forums » Microcontrollers » C2000™ Microcontrollers » C2000 32-bit Microcontrollers Forum » Problem waking device from LPM Halt state with a particular GPIO pin (GPIO29)
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  • Problem waking device from LPM Halt state with a particular GPIO pin (GPIO29)

    Problem waking device from LPM Halt state with a particular GPIO pin (GPIO29)

    This question is answered
    Jason Reinhart
    Posted by Jason Reinhart
    on Aug 09 2012 15:20 PM
    Intellectual395 points

    I'm using a TMS320F28334 in a design and it is behaving unexpectedly when trying to use GPIO29 as a source to wake processor from LPM halt state.  I am using a few other GPIO pins to wake the device without any issues.  

    After setting GpioIntRegs.GPIOLPMSEL.all = 0x20000000,(GPIO29 selected as wake source), and putting the device into Halt LPM state, the device does the following:

    When there is a falling edge on GPIO29, the unit processor does not wake.  If other GPIO are selected as wake sources along with GPIO29 they no longer wake the processor after GPIO29 goes low.  The device is stuck.  Only when GPIO29 transitions high does the processor wake up.  This is counter to what the datasheet describes.  The datasheet states that only negative transitions can wake the processor.  This seems to be the case for all other GPIO I am using as wake sources.

    I have experimented with aggressively filtering the signal on GPIO29 with an RC filter.  I even put a filter cap directly beneath the GPIO29 BGA pin.  The behavior is the same.  I do not observe any noise or glitching on this line on the oscilloscope so I don't think this is noise related.

    The problem is consistent on multiple boards with different processors.

    Any ideas?

    Thanks!

    TMS320F28334 Wake LPM Halt Delfino
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    • Louis Peryea
      Posted by Louis Peryea
      on Sep 10 2012 15:39 PM
      Verified Answer
      Verified by Jason Reinhart
      Intellectual845 points

      Hi Jason,

      I'm looking into your problem right now.

      My understanding is: your device is in HALT mode; and in order to wake it you've determind you need a pulse as opposed to a falling edge.

      Looking at the timing diagram for Halt Wake-up it appears the pin could need to be pulled high after the PLL has stabilized. But that there is a necessary wait time of toscst + 2tc(OSCCLK) (Figure 6-18 HALT Mode Timing Requirements)

      I'm investigating further as to whether this is a coincidence in the timing diagram or a necessity. But based on the requirements for exiting IDLE mode I suspect a pulse may be necessary.

      -Louis

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    • Louis Peryea
      Posted by Louis Peryea
      on Sep 11 2012 15:19 PM
      Verified Answer
      Verified by Jason Reinhart
      Intellectual845 points

      Hi Jason,

      I looked into your problem with our factory guys, the F 2833x devices need to be pulsed to be woken from HALT mode.

      The spec listed in the data sheet is the minimum time it takes for the PLL to stabilize. In other words, it's the smallest pulse you can send to safely wake the processor.

      On the first low transistion the device wakes and starts the clocks but code execution wont commence until a high transition.

      I attached an example that places a 2833x in HALT and toggles an output after exiting.

      Hope this solves your problem!

      Thanks,

       Louis

      3223.Example_2833xHaltWake_modified.c

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    • Jason Reinhart
      Posted by Jason Reinhart
      on Sep 13 2012 15:11 PM
      Intellectual395 points

      Thanks Louis.

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