I have a 28027 I2C woking in slave mode. Normally MDR is 0x4020, STR is 0x0410.
Then I used a strange bus event sequence like: start+slave_address_rd+(1byte reading)+ no stop +start+slave_address_wr+stop. And I got a dead I2C slave module (28027), whose STR became 0x5210 and MDR was unchanged. Since then, the slave I2C will never response to I2C master.
I used to believe the I2C slave would recover from any START conditions or STOP conditions or START/STOP pairs. But that is not true in my case.
Does that mean I have to reset the slave module to make the I2C bus recovery?
I have to ask for some help about 28027's i2c (Slave mode) here.
1) about the unrecoverable BB I reported in this thread, the bus event sequence would cause a slave mode i2c of 28027 dead. By dead, no AAS interrupt, or SCD interrupt, or XRDY interrupt, or RRDY interrupt can be triggerred. Which means I have to open a thread to detect if the I2C module is dead. So I'd like to know some better choice than begin an extra thread in my code.
By the way, the same bus event sequence I mentioned, even strange, won't cause an standard EEPROM dead, which is also working as a slave device.
2) About slave mode, how to flush an TX FIFO? Let me explain here. If a master sends a START and initializes a new session with the slave device, I need to flush an TX FIFO when I got a new START before my TX FIFO ran out. I tried to clear TXFFRST and set it again, but it seems unstable. Sometimes it works, sometimes doesn't. So I'd like to know official process of FLUSH the TX FIFO since the description of the TXFFST4:0 doesn't say anything about slave mode. Would the XSR flushed too?
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