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Concerto: Use of ePWM's EPWMXLINK Register

Hi -

Each of the ePWM modules of the Concerto's C28x includes an EPWMx Link Register (EPWMXLINK).  I am trying to use these registers to force the TBPRD in ePWM2 through ePWM6 to be written when ePWM1's is written.  Here is a code snippet:

 EPwm2Regs.EPWMXLINK.bit.TBPRDLINK = 2;  // link TBPRD to ePWM1

EPwm3Regs.EPWMXLINK.bit.TBPRDLINK = 2;  // link TBPRD to ePWM1

EPwm4Regs.EPWMXLINK.bit.TBPRDLINK = 2;  // link TBPRD to ePWM1

EPwm5Regs.EPWMXLINK.bit.TBPRDLINK = 2;  // link TBPRD to ePWM1

EPwm6Regs.EPWMXLINK.bit.TBPRDLINK = 2;  // link TBPRD to ePWM1

EPwm1Regs.TBPRD = PWM_ONEHALF_PERIOD;  // Set timer period

 

After the last statement (above) has executed, ePWM1's TBPRD contains the correct value, but none of the others have been written to.  According to the manual, a simultaneous write to all of them should have occurred.  Are there other setup conditions that are necessary for this operation to work?

Thanks,

Chuck

 

  • Hi Chuck,

    I was wondering if we could close this thread based on the conversation we had via email. For documentation purposes, here is the summary of what we have discussed:

    The reading and writing of certain registers should occur via shadowed or mirrored registers.The mirroring of registers is what allows the reading and/or writing either without operation interference or with additional functionality. The behavior of reads and writes is also dependent on mode of operation, immediate or shadow.

    The idea behind the mirroring of registers is to allow the sharing of special function registers by the CPU and peripherals in a more modular scheme, or the equivalent of opening two doors to the same room. It also minimizes data page pointer switching by having the same register in multiple memory locations. This is obviously critical for high performance systems. It does not mean the information is being duplicated; it means the address decoder is opening access to the same location via different addresses. Although you should always favor reading and writing to appropriate mirrored locations, the exceptions are many and the consultation of the TRM is critical. Just to give you an example, the register TBPRDHRM (mirrored), when read in immediate mode does not represent the content of the TBPRDHR; it is used for TI internal testing. However when in shadow mode, it returns the active value of TBPRDHR. It is the only location in which you can read the active value in shadow mode, so it is important to understand the functionality of the mirrored addresses.

    If you still have difficulties with this, please let us know. Thanks!

    Lenio

  • Hi Lenio,

    I have the same problem. I want to change the CMPA of the ePWM2 and ePMW3 with the same value but I am not be able to do it with the EPWMXLINK Register.

    Reading this answer I mean I can’t use the EPWMXLINK Register if I use the shadow mode for the CMPA. That’s what you mean? If I’m wrong, could you explain me if are there another premise to use EPWMXLINK Register?

    Thanks you.
  • CMPA should be updated for both ePWM2 & 3 via EPWMXLINK register. You might need to review the configuration of CMPCTL first. For CMPA, the two bits named LOADASYNC will determine whether CMPA will be updated either on a sync event, on a counter event, or on both. Please search for LOADAMODE, LOADASYNC in the Technical Reference Manual. You will have to make some choices based on the application requirements.

  • Hi Lenio.

    Let me explain my case:

    I’m using ePWM2 and 3. I’m using shadow mode for PRD, CMPA and CMPB. I’m loading the shadow register to the active register on zero, period and on the sync event. Then, in order to load CMPA and CMPB registers simultaneously for both ePWMs, I’m using the EPWMXLINK register. Below I show the part of my code concerning to the epwms configuration:

    EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm2Regs.CMPCTL.bit.LOADASYNC = CC_LOAD_SYNC;
    EPwm2Regs.CMPCTL.bit.LOADBSYNC = CC_LOAD_SYNC;
    EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD;
    EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO_PRD;
    EPwm3Regs.EPWMXLINK.bit.CMPALINK = 3;
    EPwm3Regs.EPWMXLINK.bit.CMPBLINK = 3;
    EPwm3Regs.EPWMXLINK.bit.TBPRDLINK = 3;
    EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm3Regs.CMPCTL.bit.LOADASYNC = CC_LOAD_SYNC;
    EPwm3Regs.CMPCTL.bit.LOADBSYNC = CC_LOAD_SYNC;
    EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD;
    EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO_PRD;

    Then, debugging my program and changing the CMPA register of ePMW2 (EPwm2Regs.CMPA.half.CMPA) on the watch windows, I cannot see any change on the CMPA on the ePWM3. Any variation occurs on the ePWM3 on the watch windows neither on the oscilloscope.

    However, changing the CMPA register of ePMW3 (EPwm3Regs.CMPA.half.CMPA) on the watch windows changes the output of ePWM3... If the EPWMXLINK is configured like above, this changes must cause no variation on the output, right? (Because EPWMXLINK of ePWM3 links to ePWM2 and not to itself). Of course, CMPA of ePWM2 has not been changed after change the CMPA of ePWM3.

    Reading the ePWM technical reference, I am not be able to find the issue of my configuration…

    Could you help me?

    Thanks you for all.