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[Q] controlling ePWM output with analog comparator (28069, piccolo)

Other Parts Discussed in Thread: UCC28061

Hello, I'm struggling with the analog comparator module in 28069.

I want to make ePWM output high for constant time, at the rising edge of the analog comparator output like UCC28061.

However, if the output of analog comparator remained high, DCxEVT is produced continuously and ePWM output also remained high.

So, in ISR of DCxEVT, I tried to disable DCAH event (comparator high) when DCAH flag is 1, and then enalbe DCAH event when DCAL event occurs (comparator low).

However, ISR takes too long time to get proper result, since the system is required to operate as fast as up to 100kHz.

In this case, could you tell me how I can solve this problem?

Is it possible to get DCxEVT at the rising edge of analog comparator output without using additional ISRs??

Actually, I would like to implement CRM boost PFC converter with 28069.

Best regards,

  • Hi,

    This is possible on 28069. Instead of using the DCxEVT to trip the PWM output using the TZ sub-module, you could instead use this signal to synchronize the PWM time base. This way on every comparator rising edge the PWM time-base counter can be synchronized to 0 (say) i.e. TBPHS = 0. For constant on-time, you can configure the PWM output to 'Set' on CTR = ZERO (if TBPHS = 0, above) and 'Reset' on CMPA/CMPB (=ON time). Make sure that all options in TZCTL registers are configured to 'Do Nothing'.

    I hope this helps.

    Hrishi

  • Thank you Hrishi. It was possible to get the operation I wanted by using comparator output as ePWMSYNCI.

    ePWM output was turned on at the rising edge of comparator output, and constant time was obtained by setting CMPA.

    However, I still have some problems with it, because I want 2 ePWM outputs to be turned on at each rising edge of comparator output.

    This is because I have to implement interleaved PWM signal independently. However, in datasheet, it seems that all ePWMSYNCI inputs are in chain structure.

    In this case, what can be the most appropriate solution? Thank you very much in advance.

    Best regards,

  • Completed.

    DCxEVT.sync singals can also be used as an ePWM output trigger.

    DCxEVT.sync singals (COMP1 and 2 OUT) reset the ePWM1 and 2 counter registers independently so that at the rising edge of COMP1 and COMP2 ePWM1 and ePWM2 output can be high and they are turned on for constant time.

    Thank you very much, Hrishi

  • Excellent! Good work!

    Hrishi

  • Hello Jongwoo and  Hrishi,

         I encountered the same problem.

         But I just want one cycle of a constant on time signal , at the rising edge of the analog comparator output.

         As proposed in this post , I use the DCxEVT to synchronize the PWM time base, and constant time was obtained by setting CMPA, then how can I stop the constant on time signal so that I can just get one cycle ?

         hope you can get my question .

         Thank you .

  • Hi Yang,

    A simple solution for this is to set the period value for the PWM to the maximum possible i.e. 65535d. This will give you plenty of time to disable further PWM pulses from the software. You can elect to either generate an ISR on a compare match (same compare that defines the end of the pulse) or use an exisiting periodic software loop/state machine. Once the pulse has been generated you can disable further PWM generation by changing action qualifier action setting, compare register value, freezing the counter or changing PWM output to GPIO and driving it low from inside this software routine.

    I hope this helps.

    Hrishi

  • Thank you Hrishi. 

    I thought about your solution, and it enlightens me, but I still have some problems with it.

    I want one cycle of constant on time signal at the rising edge of the analog comparator output, and I should keep EPWM1 in halted state, i.e.  freezing the counter you have mentioned , then when the next rising edge of the analog comparator output occurs, I want to trriger the EPWM1 at once to get another constant on time cycle again, and the code repeats itself.

    Because EPWM2 EPWM3 are used to handle other tasks, and compare register value needs to be constant,

    My problem is how can I freeze the counter and do not affact the other two EPWM modules ?

    investigate the datasheet, find the bit CTRMODE can Stop-freeze counter, but it also puts " The time-base counter mode is normally configured once and not changed during normal operation " , so I am confused.

    thank you very much.