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Input signal qualification

Hi,

I am using 28335, Delfino, experimenter's kit and interfacing it with Nexys-2 FPGA board.

I want to generate bidirectional data bus. For this, I want to use input data qualification. But, I don't know how to do it. 

i.e. I don't know which instructions to use and how to use.  I found no example for this.

Can some body give me codes to read GPIO0-7 with   Six-Sample Sampling Window Width

Vipul Patel