interrupt void adc_fast_isr(void) { GpioDataRegs.GPBSET.bit.GPIO60 = 1; AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1 AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit PieCtrlRegs.PIEACK.bit.ACK1 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO60 = 1; return; } interrupt void adc_slow_isr(void) { volatile Uint16 TempPIEIER; TempPIEIER = PieCtrlRegs.PIEIER1.bit.INTx2; // Save INT 1.2 in the PIE register for later IER |= M_INT1; // Enable INT1 IER &= M_INT1; // Disable the other interrupt levels PieCtrlRegs.PIEIER1.bit.INTx2 = 0; // Disable INT 1.2 in the PIE PieCtrlRegs.PIEACK.bit.ACK1 = 1; // Acknowledge PIE interrupt group 1 asm(" NOP"); EINT; GpioDataRegs.GPBSET.bit.GPIO62 = 1; AdcRegs.ADCTRL2.bit.RST_SEQ2 = 1; // Reset SEQ2 AdcRegs.ADCST.bit.INT_SEQ2_CLR = 1; // Clear INT SEQ2 bit DINT; // Disable CPU interrupts PieCtrlRegs.PIEIER1.bit.INTx2 = TempPIEIER; GpioDataRegs.GPBCLEAR.bit.GPIO62 = 1; return; }
I have the above nested interrupts. The fast adc interrupt is INT1.1 and is triggered by SOCA from EPWM1. The slow interrupt is INT1.2 and is triggered by SOCB from EPWM2. And EPWM1 and EPWM2 are synchronized. As We can see from this code, GPIO60 should always lead GPIO62. But for some random reasons, I find that sometime GPIO62 leads GPIO60.
Does anyone know what's wrong with my code?