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SCI RxD Interrupt not triggered TMS320f28027

Hello community and TI,

I have a problem with the SCI interrupt routines and I'm not able to solve it or find any solution.

What I would like to do is just an ISR call if a single word was received by the SCI unit.

The evaluation board is connected to a computer where an serial port terminal is running, which is sending same commands. The transmitting is fine, the F28027 DSP is sending data and the PC is receiving it. But vice versa it is not working. The data will be send to the GPIO28 pin, which is configured as SCI with asynch input. The send data are correctly and also its not a baud fault (checked by oscilloscope). Interrupt routines are enabled (PIEIER, IER, INTM) and should be able to trigger. My SCI configuration is shown below:

void InitSCI(void)

{    

//Initialize SCI communication register    

//8 character bits, 1 stop bit, no parity, no loop back, idle-line protocol  

SciaRegs.SCICCR.all = 0x07;

//SCI control register 1  

//Enable transmitter; Enable receiver (send to SCIRXEMU and SCIRXBUF)    

SciaRegs.SCICTL1.bit.RXENA = 1;    

SciaRegs.SCICTL1.bit.TXENA = 1;

//SCI control register 2    

//Enable receive buffer interrupts (RXRDY/BRKDT interrupt)    

SciaRegs.SCICTL2.bit.RXBKINTENA = 1;

//Set Baudrate register (Baud = LSPCLK/((BRR+1)*8))    

//115200 baud @LSPCLK = 15MHz (60 MHz SYSCLK)    

SciaRegs.SCIHBAUD = 0x00;  //0x00    

SciaRegs.SCILBAUD = 0x0F;  //0x0F --> 115200 baud

//SCI reset (should be 1), FIFO enable    

SciaRegs.SCIFFTX.bit.SCIRST = 1;    

SciaRegs.SCIFFTX.bit.SCIFFENA = 1;

//FIFO Buffer TX: TXFIFO interrupt, TXFFINT flag clear, hold FIFO in reset    

//SciaRegs.SCIFFTX.bit.TXFFIENA = 1;    

//SciaRegs.SCIFFTX.bit.TXFFINTCLR = 1;    

SciaRegs.SCIFFTX.bit.TXFIFOXRESET = 0;

//FIFO Buffer RX: RX overflow flag clear, RX interrupt flag clear, interrupt level bit = 1 (each word an interrupt), RX interrupt enable, hold FIFO in reset    

SciaRegs.SCIFFRX.bit.RXFFOVRCLR = 1;    

SciaRegs.SCIFFRX.bit.RXFFINTCLR = 1;    

SciaRegs.SCIFFRX.bit.RXFFIL = 1;    

SciaRegs.SCIFFRX.bit.RXFFIENA = 1;    

SciaRegs.SCIFFRX.bit.RXFIFORESET = 0;

//No delay, no auto-baud    

SciaRegs.SCIFFCT.all = 0x00;

//Relinquish SCI from Reset    

SciaRegs.SCICTL1.bit.SWRESET = 1;

//FIFO transmit/receive re-enable    

SciaRegs.SCIFFTX.bit.TXFIFOXRESET = 1;    

SciaRegs.SCIFFRX.bit.RXFIFORESET = 1;

//Works fine with loop back, not working without    

//SciaRegs.SCICCR.bit.LOOPBKENA = 1;

}

I dont care about transmit interrupts, but the RxD interrupts are important and i try to fix it since two days.

One note: If i send data via the SCI interface, the RxD buffer is always empty, which would explain, that no interrupt is called, but with loop-back its working fine.

I would be glad for any help.

Kindly regards

D. Beinlich