F28027 SPI Wait for transmission

Hi,

I'm new to SPI but have had some success communicating with an OLED. I basically jury rigged my chip select because I couldn't get it to work by waiting for any of the buffers to clear (pretty much tried them all/FIFO TX/RX etc)- thinking that my config is a little off? The device treats data as commands when the chip select is low and as data when it is high, so I can't use SPISTEA natively - I don't think?

Basically what I have done is watched SPISTEA (GPIO19) and triggered CS based off of this - - it works but I would like to do it properly & my logic analyzer shows that it wastes a few clock cycles this way.

my write command code:

inline void writeCommand(const uint8_t command)
{
GPIO_setLow(myGpio,GPIO_Number_5);//DC - Set as command when low
SPI_write8(mySpi, command);
DELAY_US(1);
while(!GpioDataRegs.GPADAT.bit.GPIO19);//SpiaRegs.SPIFFTX.bit.TXFFST);//Wait for transmission
GPIO_setHigh(myGpio,GPIO_Number_5);//As Data
}

Thanks

my config:

//Set clk polarity =1
// uint16_t i;

CPU_Handle myCpu;
PLL_Handle myPll;
WDOG_Handle myWDog;

// Initialize all the handles needed for this application
myAdc = ADC_init((void *)ADC_BASE_ADDR, sizeof(ADC_Obj));
myClk = CLK_init((void *)CLK_BASE_ADDR, sizeof(CLK_Obj));
myCpu = CPU_init((void *)NULL, sizeof(CPU_Obj));
myFlash = FLASH_init((void *)FLASH_BASE_ADDR, sizeof(FLASH_Obj));
myGpio = GPIO_init((void *)GPIO_BASE_ADDR, sizeof(GPIO_Obj));
myPie = PIE_init((void *)PIE_BASE_ADDR, sizeof(PIE_Obj));
myPll = PLL_init((void *)PLL_BASE_ADDR, sizeof(PLL_Obj));
mySpi = SPI_init((void *)SPIA_BASE_ADDR, sizeof(SPI_Obj));
myWDog = WDOG_init((void *)WDOG_BASE_ADDR, sizeof(WDOG_Obj));

// Perform basic system initialization
WDOG_disable(myWDog);
CLK_enableAdcClock(myClk);
(*Device_cal)();

//Enable SPI-A Clock
CLK_enableSpiaClock(myClk);

//Select the internal oscillator 1 as the clock source
CLK_setOscSrc(myClk, CLK_OscSrc_Internal);


// Setup the PLL for x12 /2 which will yield 60Mhz = 10Mhz * 12 / 2
PLL_setup(myPll, PLL_Multiplier_12, PLL_DivideSelect_ClkIn_by_2);

EALLOW;//SPI clock at 30MHZ
SysCtrlRegs.LOSPCP.bit.LSPCLK = 1;
EDIS;

// Disable the PIE and all interrupts
PIE_disable(myPie);
PIE_disableAllInts(myPie);
CPU_disableGlobalInts(myCpu);
CPU_clearIntFlags(myCpu);

// If running from flash copy RAM only functions to RAM
#ifdef _FLASH
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif

Gpio_init();

// Setup a debug vector table and enable the PIE
PIE_setDebugIntVectorTable(myPie);
PIE_enable(myPie);

// Register interrupt handlers in the PIE vector table


// Initialize the SPI only
spi_init();



// CPU_enableInt(myCpu, CPU_IntNumber_6);
// CPU_enableGlobalInts(myCpu);

void Gpio_init(void)
{
/*
SCK- GPIO18 - Pin 7 J1
DC - GPIO5 - Pin 6 J6
RST- GPIO4 - Pin 5 J6
CS - GPIO6 - Pin 8 J2
MOSI-SPI_MOSI-Pin 7 J6
*/

GPIO_setPullUp(myGpio, GPIO_Number_16, GPIO_PullUp_Enable);
GPIO_setPullUp(myGpio, GPIO_Number_17, GPIO_PullUp_Enable);
GPIO_setPullUp(myGpio, GPIO_Number_18, GPIO_PullUp_Enable);
GPIO_setPullUp(myGpio, GPIO_Number_19, GPIO_PullUp_Enable);
GPIO_setQualification(myGpio, GPIO_Number_16, GPIO_Qual_ASync);
GPIO_setQualification(myGpio, GPIO_Number_17, GPIO_Qual_ASync);
GPIO_setQualification(myGpio, GPIO_Number_18, GPIO_Qual_ASync);
GPIO_setQualification(myGpio, GPIO_Number_19, GPIO_Qual_ASync);
GPIO_setMode(myGpio, GPIO_Number_16, GPIO_16_Mode_SPISIMOA);
GPIO_setMode(myGpio, GPIO_Number_17, GPIO_17_Mode_SPISOMIA);
GPIO_setMode(myGpio, GPIO_Number_18, GPIO_18_Mode_SPICLKA);
GPIO_setMode(myGpio, GPIO_Number_19, GPIO_19_Mode_SPISTEA_NOT);

GPIO_setPullUp(myGpio, GPIO_Number_4, GPIO_PullUp_Enable);
GPIO_setPullUp(myGpio, GPIO_Number_5, GPIO_PullUp_Enable);
GPIO_setPullUp(myGpio, GPIO_Number_6, GPIO_PullUp_Enable);

GPIO_setMode(myGpio, GPIO_Number_4, GPIO_0_Mode_GeneralPurpose);
GPIO_setMode(myGpio, GPIO_Number_5, GPIO_0_Mode_GeneralPurpose);
GPIO_setMode(myGpio, GPIO_Number_6, GPIO_0_Mode_GeneralPurpose);

GPIO_setDirection(myGpio,GPIO_Number_4,GPIO_Direction_Output);
GPIO_setDirection(myGpio,GPIO_Number_5,GPIO_Direction_Output);
GPIO_setDirection(myGpio,GPIO_Number_6,GPIO_Direction_Output);

GPIO_setHigh(myGpio,GPIO_Number_4);
GPIO_setHigh(myGpio,GPIO_Number_5);
GPIO_setHigh(myGpio,GPIO_Number_6);
}
void spi_init()
{

SPI_reset(mySpi);
SPI_enable(mySpi);

//SPI clock at 30MHZ
// CLK_setLowSpdPreScaler(myClk,CLK_LowSpdPreScaler_SysClkOut_by_1);

// Reset on, rising edge, 16-bit char bits
SPI_setCharLength(mySpi, SPI_CharLength_8_Bits);//16
SPI_disableLoopBack(mySpi); //enabled

// Enable master mode, normal phase,
// enable talk, and SPI int disabled.
SPI_setMode(mySpi, SPI_Mode_Master);
SPI_enableTx(mySpi);
//SPI_enableOverRunInt(mySpi);
//SPI_enableInt(mySpi);

SPI_setBaudRate(mySpi, (SPI_BaudRate_e)0x1);//0x63); //8MHz

// // Initialize SPI FIFO registers
SPI_enableFifoEnh(mySpi);
SPI_enableChannels(mySpi);
SPI_resetTxFifo(mySpi);
SPI_clearTxFifoInt(mySpi);
SPI_setTxFifoIntLevel(mySpi, SPI_FifoLevel_2_Words);
SPI_enableTxFifoInt(mySpi);

// SPI_resetRxFifo(mySpi);
// SPI_setRxFifoIntLevel(mySpi, SPI_FifoLevel_2_Words);
//SPI_enableRxFifoInt(mySpi);
//SPI_clearRxFifoInt(mySpi);

SPI_setTxDelay(mySpi, 0);

SPI_setClkPolarity (mySpi, SPI_ClkPolarity_OutputFallingEdge_InputRisingEdge);


// Set so breakpoints don't disturb xmission
SPI_setPriority(mySpi, SPI_Priority_FreeRun);

SPI_enable(mySpi);

SPI_enableTxFifo(mySpi);
// SPI_enableRxFifo(mySpi);


}

void spi_fifo_init()
{

// Initialize SPI FIFO registers
SPI_enableChannels(mySpi);
SPI_enableFifoEnh(mySpi);
SPI_resetTxFifo(mySpi);
SPI_clearTxFifoInt(mySpi);
SPI_resetRxFifo(mySpi);
SPI_clearRxFifoInt(mySpi);
SPI_setTxFifoIntLevel(mySpi, SPI_FifoLevel_4_Words);

return;
}

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