Hi all,
I have been trying to use the SPI peripheral to control a device, but I've been having issues with the CS line. What I find is that when CLOCK PHASE=1 and CLOCK POLARITY=0, the CS line returns to high (or disasserts) at exactly the same time as the final falling edge of the clock. This is causing problems with the SPI device I am trying to control, and I have verified that this is indeed the problem by doing the CS timing on my own.
What I'm wondering is if there is a way to tell the peripheral what the setup and hold times are for the CS signal? Else I'll have to keep using this slightly inefficient way of controling the line.
Best Regards,
Jama