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f28377d dac offset

Hi TI Community,

I am making digital to analog conversion with f 28377d board. I have no problem with "daca" and "dacb" however when I use "dacc" there is some offset voltage on it. (about 50mV )

Is this a hardware problem? and  How can I solve it?

Have a nice work

  • 50mV sounds like quite a bit of offset.  What voltage reference mode are you using?  Also, what DAC code are you observing?

  • I think I am using default reference values because I didnt make any arrangement about them.

    The code is quite simple;

    DacaRegs.DACCTL.bit.DACREFSEL=1

    DacaRegs.DACCTL.bit.MODE=0

    DacaRegs.DACCTL.bit.LOADMODE=0

    DacaRegs.DACOUTEN.bit.DACOUTEN=1

     

    DacbRegs.DACCTL.bit.DACREFSEL=1

    DacbRegs.DACCTL.bit.MODE=0

    DacbRegs.DACCTL.bit.LOADMODE=0

    DacbRegs.DACOUTEN.bit.DACOUTEN=1

    DaccRegs.DACCTL.bit.DACREFSEL=1

    DaccRegs.DACCTL.bit.MODE=0

    DaccRegs.DACCTL.bit.LOADMODE=0

    DaccRegs.DACOUTEN.bit.DACOUTEN=1

     

    //then I write the register values and observe them on oscilloscope and see a offset value on "dacc"

     

    DacaRegs.DACVALS.bit.DACVALS=1024

    DacbRegs.DACVALS.bit.DACVALS=1024

    DaccRegs.DACVALS.bit.DACVALS=1024

  • Can you check the voltage supplied to the VREFHI_B pin and compare that against VREFHI_A?

    For DACREFSEL=1, DACA and DACB both use VREFHI_A as the voltage reference, and DACC uses VREFHI_B.

  • Thank you for your reply.

    I have checked the VREFHI-A-B-C-D but I think the problem is not that. I changed all the VREFHI from 3.3 to 3V by changing SW3 and SW4 but the result didn't change. The DACC is still larger about 40mV from DACB and DACA.

    Do you have any other suggestion?

  • So when you say that DACC has offset voltage, is that with respect to DACA and DACB, or is that an absolute voltage offset with respect to the ideal, expected voltage?  Are the DACs driving an external load when you measure the voltage?

    A 50mV offset between DAC modules is within the range of expectations because of the following:

    1. The DAC modules on TMX devices (which is the only type available right now) are currently not offset-trimmed so each DAC will have its own inherent offset error.
    2. The typical amount of absolute offset error is expected to be in the range of +/- 40mV; there is no expected range for offset error between DAC modules; this will be taken care of when the DACs are eventually offset-trimmed.
    3. If DACA/B have inherent errors of -20mV while DACC has an inherent error of +30mV, the difference between DACC and DACA/B would be 50mV.

    An absolute voltage error of 50mV for an untrimmed DAC is outside of the typical range, but it is not grossly outside the range of expectations so it is possible that DACC on the device simply has that much inherent error.

    Changing the reference from 3.3V to 3.0V should have shifted the absolute voltage by about 75mV:

    (1024 x 3.3V) / 4096 = 0.825V
    (1024 x 3.0V) / 4096 = 0.75V