F28377D ADC and Comparator

Hi,

xijun ni said:

So, can the CMPIN1N pin work as the ADCINA3 simultaneously for a single 12-bit ADC input? 

If you check the internal block diagram of Comparator 1 module:

Both of them seem to be interlinked and dependent on their individual inputs. Hence, once comparator module is enabled both CMPIN1N & CMPIN1P get enabled and can't be disabled individually.

Regards,

Gautam

There are no isolation structures on this device between the analog modules that share a pin.  As such, you will be able to use all of the analog functions available to the pin in parallel.

You can see that each analog pin has at most a single output function so there will be no risk of contention between multiple outputs on the pin.

In your example of ADCINA3 shared with CMPIN1N, you will be able to use ADCINA3 when CMPSS1 is active. Also, when you use the internal DAC as the negative reference, there is a MUX inside the CMPSS module that will block off the external signal before it reaches the comparator.

-Tommy

Thank you very much for your answers. Does anyone have the test results?

Hi,

xijun ni said:

Thank you very much for your answers. Does anyone have the test results?

Why don't you try out as Tommy has suggested? Also, a TIer has confirmed about the simultaneous working. So there's no need for any tests/test results. Do implement the same and keep us informed on what your observations are.

Regards,

Gautam

Hi everyone,

     I have bought the development kit and tested it. So, i have verified that the adc and comparator can work simultaneously when we use the P-pin as comparator input and N-pin as adc input.

     Thank you for the reply.

That's Great!

Goodluck & Regards,

Gautam

When I use it, I find CMPSS1,CMPSS2,CMPSS6,CMPSS7 and CMPSS8 are OK, but CMPSS4 and CMPSS5 have not CTRIP signal.

Hi user3892996,

CMPSS 4 and 5 are not available on Rev. 0 and Rev. A silicon (see the device errata).  These are available on Rev. B silicon.