Hi community,
I'm looking for a solution using a piccolo device to generate:
1) a single PWM pulse,
2) with fixed maximum on time,
3) adjustable overcurrent threshold to disable the pulse,
4) almost no delay between external trigger and pulse output,
5) configurable trigger input qualification,
6) configurable blanking window of overcurrent tripping,
I'm currently thinking of:
Configuring an epwm unit in downcount mode, reload with 1, sync on external pin with a phase value that equals the maximum pulse width, use the comparator with dac and digital compare module to generate blanking and trip zone events.
The drawback i found until now is, according to posts here, that the SYNC-input has an intrinsic delay of 6-7 cycles, and we will add some more delay by input qualification.
Is there a smarter solution (...not using a CPLD/FPGA), or does anyone have other ideas?
Kind Regards
David