I have used the <F2808.cmd> which come from location C:\ti\ccsv6\ccs_base\c2000\include. I have some query. Understanding that Page 0 is program (FLASH/ROM) and Page 1 is Data (RAM). It appear the Page 0 is mirror of Page 1.
Query:
(1) Looking into the F2808.cmd, why <RAML0> in Page 0?, what the reason for that?, how does linker deal this?,
RAML0 : origin = 0x008000, length = 0x001000 /* on-chip RAM block L0..... in Page 0*/
(2) Looking into the F2808.cmd, why <FLASHB> in Page 1?, what the reason for that?, how does linker deal this?,
FLASHB : origin = 0x3F0000, length = 0x004000 /* on-chip FLASH.....in Page 1
(3) The
<F2808.cmd> does not support the ROM table such as _IQexp(). I have looked into location C:\ti\controlSUITE\libs\math\IQmath\v160\examples\cmd for<2808_IQmath_lnk.cmd>, I was trying to include the IQmathTablesRam but uncetain if I know what I was doing....(one of TI slide say that it rare for programmer to modify).
(a) The IQmathTablesRam has specify RAML0L1 and thus <IQmathTablesRam : > RAML0L1, PAGE = 1>
(b) where in F2808.cmd use two RAML0 and RAML1 so I cannot use RAML0L1
(c) I inserted the IQmathTablesRam : > RAML0, PAGE = 1>
Complier has complies the code without error (I has to suppressed warning flags: --diag_suppress=16002)
Q: Am I doing this right?, why it has to be in RAM rather than ROM where table is constant
(4) By inspection of Memory Allocation under CCSV6
(a) Why the IQmathTablesRam are in RAM not in ROM, how to put it to ROM so I can use more RAM?
(b) Why FLASHB is not shown in the Memory Allocation?, is this intended or bug?
(5) Memory Allocation does not provide information about memory map address, is there tool in CCSV6 to shown this?
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Below is the snippet from modified F2808.cmd
MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
RAML0 : origin = 0x008000, length = 0x001000 /* on-chip RAM block L0 */
OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */
FLASHD : origin = 0x3E8000, length = 0x004000 /* on-chip FLASH */
FLASHC : origin = 0x3EC000, length = 0x004000 /* on-chip FLASH */
FLASHA : origin = 0x3F4000, length = 0x003F80 /* on-chip FLASH */
CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CSM_PWL : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
ROM : origin = 0x3FF000, length = 0x000FC0 /* Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
/* Registers remain on PAGE1 */
RAMM0 : origin = 0x000000, length = 0x000400 /* on-chip RAM block M0 */
BOOT_RSVD : origin = 0x000400, length = 0x000080 /* Part of M1, BOOT rom will use this for stack */
RAMM1 : origin = 0x000480, length = 0x000380 /* on-chip RAM block M1 */
RAML1 : origin = 0x009000, length = 0x001000 /* on-chip RAM block L1 */
FLASHB : origin = 0x3F0000, length = 0x004000 /* on-chip FLASH */
RAMH0 : origin = 0x3FA000, length = 0x002000 /* on-chip RAM block H0 */
}
/* Allocate sections to memory blocks.
Note:
codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
execution when booting to flash
ramfuncs user defined section to store functions that will be copied from Flash into RAM
*/
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHA PAGE = 0
.pinit : > FLASHA, PAGE = 0
.text : > FLASHA PAGE = 0
codestart : > BEGIN PAGE = 0
ramfuncs : LOAD = FLASHD,
RUN = RAML0,
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
PAGE = 0
csmpasswds : > CSM_PWL PAGE = 0
csm_rsvd : > CSM_RSVD PAGE = 0
/* Allocate uninitalized data sections: */
.stack : > RAMM0 PAGE = 1
.ebss : > RAML1 PAGE = 1
.esysmem : > RAMH0 PAGE = 1
/* Initalized sections go in Flash */
/* For SDFlash to program these, they must be allocated to page 0 */
.econst : > FLASHA PAGE = 0
.switch : > FLASHA PAGE = 0
/* Allocate IQ math areas: */
IQmath : > FLASHC PAGE = 0 /* Math Code */
IQmathTables : > ROM PAGE = 0, TYPE = NOLOAD /* Math Tables In ROM */
IQmathTablesRam : > RAML1, PAGE = 1
/* .reset is a standard section used by the compiler. It contains the */
/* the address of the start of _c_int00 for C Code. /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed. Thus the default type is set here to */
/* DSECT */
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS PAGE = 0, TYPE = DSECT
}
