TMS320F2837xD - peripherial using by dual core aplication

Hi Raja,

Raja Saha94 said:

The ownership for these peripherials will be given from CPU1 (by CpuSEL reg). But the the GPIO configuration for these peripherials should be done from CPU1 or CPU2?

First statement is correct and GPIO configuration should be done from CPU1. You can check out this example :

C:\ti\controlSUITE\device_support\F2837xD\v130\F2837xD_examples_Dual\blinky_dc

Regards,

Gautam

Thanks Gautam for ur response.
The example shows the controllable authority of CPU, i.e. which CPU will control the particular GPIO.
However I was talking about the gpio configuration of a peripherial.
Say an example, I want to use SPI-A from CPU2.
The gpios related to MOSI,MISO,SPICLK etc. will be configured by CPU1 or 2?
Regards
Raja

refer to 576 of SPRUHM8C–December 2013–Revised December 2014

and page 274