about tms320c28346 " input clock fail detection"

kwanghae lee

Prodigy 90 points

Other Parts Discussed in Thread: TMS320C28346

I am graduate school of the pusan national university student in the Korea

I can understand something about 'input clock fail detection'

the manual said "sets the PLLSTS[MCLKSTS] register bit."

but PLLSTS register hasn't MCLKSTS,MCLKCLR bit

please tell me more how can I use function of input clock fail detection

thanks reading my not good English letter hahahahahaha

have a niceday!!!!!

over 9 years ago

0 Manoj Santha Mohan over 9 years ago

TI__Guru 55700 points

MCLKSTS bit is set when input clock to PLL logic goes missing. Please refer to Pg41 (section 5.2.2)of www.ti.com/.../sprufb0d.pdf to get more information on what happens when input clock fails (or) goes missing.

MCLKCLR bit is used clear MCLKSTS bit once it is set.

Regards,
Manoj

0 kwanghae lee over 9 years ago in reply to Manoj Santha Mohan

Prodigy 90 points

Thanks for your helpful answer

but I still wonder something that TMS320C28346 have reserved bit[6:2]

and your advice model (TMS320x2833,2823x) have MCLKCLR and MCLKSTS bit

is it possible that two registers are same??

if that what's mean reserved register?

Please give me helpness onemore

0 kwanghae lee over 9 years ago in reply to Manoj Santha Mohan

Prodigy 90 points

Thanks for your helpful answer

but I still wonder something that TMS320C28346 have reserved bit[6:2]

and your advice model (TMS320x2833,2823x) have MCLKCLR and MCLKSTS bit

is it possible that two registers are same??

if that what's mean reserved register?

Please give me helpness onemore

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about tms320c28346 " input clock fail detection"