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McBSP SPI transfer of 1024 16bit words with word synchronization

Andreas Wellmann
Prodigy 40 points

 

Hi all,

I need to send 1024 16bit words via SPI as master to a slave with frame (word) synchronization. Therefore I decided to use the McBSP-A and one additional DMA channel to load the DXR1 register.

So far I have been successful but I always see pauses during frame sync phase (figure below)

 

What I need is a solution without any pauses at the clock line and a frame sync signal parallel to the LSB of every word (figure below).

 

Does anybody know a solution with details regarding McBSP configuration. I tried to setup frames with one 16bit word and maximum frame frequency but haven’t been successful up to know.

Every suggestion is appreciated.

Regards

Andreas

  • 0
    Guru 30330 points
    Andreas,

    In Spi mode, this is the expected behavior. The Frame Sync is pulsed between every word.
    Have you tried configuring it in normal McBSP mode with the Maximum Fame Frequency? I would quote a User Guide section, but I don't know what device you are using. Can you share this information?

    Thanks,
    Mark
  • 0 in reply to Mark Labbato
    Prodigy 40 points
    Hi Mark,
    You’re right, I forgot the device. I’m using the F28335. I Tested several different configurations with the help of the according User Guides but haven’t been successful. In addition I tested the example project from TI (Example_2833xMcBSB_SPI_DLP) with the same result I‘ve achieved.
    Thanks a lot
    Andreas
  • 0 in reply to Andreas Wellmann
    Guru 30330 points
    Andreas,

    Have you gotten this working the way that you needed? What is your Hardware configuration?

    -Mark
  • 0 in reply to Mark Labbato
    Prodigy 40 points
    Hi Mark,
    up to know I haven't found a solution.
    I'm using the F28335.
    The situation is that I 've to communicate with a FPGA via SPI where the DSP is the SPI slave (forced by the FPGA). This means that a frame of 1024 16bit words will be clocked out without any pauses by the FPGA. Therefore I need the frame synchornization signal parallel to the LSB of any 16bit word. Because I haven't gotten the FPGA device until now, I tried to simulate the FPGA with a second F28335, but couldn't find an appropriate configuration.
    Regards
    Andreas
  • 0 in reply to Mark Labbato
    Prodigy 40 points
    Hi Mark,
    Up to now I haven’t found a solution.
    The situation is that I‘ve to communicate with a FPGA from another Company which I haven’t received. At this SPI communication I’ll be the slave and the FPGA will be the master which clocks out a frame of 1024 16bit words without any pauses. Therefore I need a frame synchronization signal parallel to the LSB of every 16bit word. To test this communication before, I decided to simulate the FPGA with a second F28335 but couldn’t find a solution until now.
    Regards
    Andreas
  • 0 in reply to Andreas Wellmann
    Guru 30330 points

    Andreas,

    I'm sorry to hear that you haven't gotten it working yet. What does the connection look like?

    It sounds like this should be possible to me. 

    Have you tried this configuration in McBSP mode? Configuring it for the maximum frame frequency with the following pin configuration might work out. all signals but the MDX would be configured as inputs in the McBSP configurations.(FSXM, FSRM, CLKXM, CLKRM all set as to 0). Also, you would be configured in normal McBSP mode.

    McBSP Direction FPGA
    MDX --> SOMI
    MCLKX <-- CLKOUT
    MFSX <-- CS
    MDR <-- SIMO
    MCLKR <-- CLKOUT
    MFSR <-- CS

    -Mark