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HRCNFG2 register missing from F2807x_epwm.h

Joe Hershberger
Prodigy 230 points

This HRCNFG2 register is needed to configure MEP on deadband rising and falling edges. I added it myself (immediately following HRMSTEP), and it worked properly.

  • Prodigy 50 points
    Hi Joe,
    The updated V150 added the HRCNFG2 register. So you don't have to add yourself.

    But I'm having another issue. Hi-res deadband doesn't seem to work properly for Rising Edge delay.
    When EPwm1Regs.DBRED equal 2 or 3, changing EPwm1Regs.DBREDHR.bit.DBREDHR doesn't move the edge. All other numbers, and the Falling Edge delay works well.

    My tests show both the 176 and BGA packages of the F2837xD have the same issue.
    Just checking if you have the same issue with F2807x? Would you mind doing a quick test on your F2807x.

    I guess this is a silicon bug in the new chip.
  • in reply to Long Pham28
    Prodigy 230 points
    As far as I can tell, the MEP works correctly on both rising and falling edge delay. This even seems to work when DBRED < 3, which Hrishi stated should not work. It's possible there is a glitch happening that I'm not noticing.

    My chip is labelled F28075PTPYFB-47AZT6W.
  • in reply to Joe Hershberger
    Prodigy 50 points

    Thanks for the information Joe,

    It's not much inconvenient as we usually don't need DBRED < 3.

    But for future high frequency converter with faster GaN mosfets, it may become a limitation.

    Long

  • in reply to Long Pham28
    Prodigy 230 points

    Based on the default clock to ePWM (60 MHz) that means the min deadband (RED >= 3) would be 50 ns. I have a need to support 20 ns deadband.  Are you saying that I should change the clock? I don't observe a problem with this on the deadband module. I certainly see a huge glitch when the CMP is less than 3.

  • in reply to Joe Hershberger
    Prodigy 50 points

    I'm not sure about CMPA (or CMPB) but I'm sure that when DBRED < 3, the ePWM doesn't work as expected.

    First issue, DBREDHR have no effect on the rising edge as seeing on the scope.

    Second issue, when you change CMPA (for example to generate sinusoidal voltage output), the deadband change unexpectedly (which means mosfet will die or low efficiency)

    Here are some tests that I wrote to test the F28377 chip:

    void test1(){
	while(1){
		FED_ps += 50;
		if(FED_ps > 200000)
			FED_ps = 0;
		PWM_set_frequency_ch123_KHz(SwitchingFrequencyKHz);
		PWM_set_duty(PWM_Channel_1, duty);

		//PWM_set_rising_edge_deadband_ns_ch123(RED_ns);
		PWM_set_rising_edge_delay_ch123_ps(RED_ps);
		PWM_set_falling_edge_delay_ch123_ps(FED_ps);

	}
}

void test2(){
	PWM_set_rising_edge_delay_ch123_ps(RED_ps);
	PWM_set_falling_edge_delay_ch123_ps(FED_ps);

	duty += duty_increment;
	if(duty > 0.92){
		duty = 0.08;
	}
	PWM_set_duty_ch123(duty);

	DELAY_US(500*delay);  // so that we can see

	PWM_update_scale_factor_optimizer();
}