Hello,
After running the PMSM3_3 example on eval board in the CCES 6 I now finally have a custom board.
On my custom board I'm using other FET's for the H-Bridge. These FETs has a slower off time than the ones used on the eval-board.
My question is where do I adjust the dead-time period from switching off lower FET in H-Bridge to allowing the higher FET in the H-Bridge to go on to prevent a high current draw in the switching period ??? Can any one advice.
Best Regards,
Kim.
