Interface the F28069 to TLV320AIC3104, McBSP SPI vs. DSP mode

I want to interface the TLV320AIC3104 codec with the TMS320F28069 (80 pin device).  To do this, it seems the best solution is to configure the McBSP of the 28069 as a slave using clock stop mode, to emulate SPI, and the 3104 in DSP mode.  These two modes seem the most compatible with each other.

If I do this, my main concern is the WCLK from the 3104 into the FSX of the 28069.  I can change the FSX to be active high instead of active low, but the WCLK from the 3104 is a pulse whereas the FSX is typically low for the duration of the transfer.  

I think the WCLK might still be useable, given this statement from section 15.7.7 in the 28069 Tech Ref Manual:

"The McBSP requires an active edge of the slave-enable signal on the FSX input for each transfer. This means that the master device must assert the slave-enable signal at the beginning of each transfer, and deassert the signal after the completion of each packet transfer; the slave-enable signal cannot remain active between transfers. Unlike the standard SPI, this pin cannot be tied low all the time. "

My question is:  If the McBSP requires an active edge, then is the WCLK suitable for this purpose, even though it de-asserts after one clock cycle?
If this won't work, is there another configuration between the two devices that would work?