C2000 ECAN Back2Back Example

/*********************************************************************
* Filename: TXLOOP_A.c                                                 *
*                                                                    *
* Description: TXLOOP - Transmit loop using any mailbox 	
* 
* Mailbox 5 is shown as an example...
* This example TRANSMITS data to another CAN module using MAILBOX5
* This program could either loop forever or transmit "n" # of times,	
* where "n" is the TXCOUNT value.
*          
* Last update:   
*********************************************************************/

#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
#include "octave_test.h"

#define COUNT  1000  // Transmission will take place (COUNT) times..

long      	i;
long 	  	loopcount = 0;
long		BO_counter = 0 ; //Counts the # of times node enters BO

main()
{

/* Create a shadow register structure for the CAN control registers. 

This is needed, since, only 32-bit access is allowed to these registers. 16-bit access
 to these registers could potentially corrupt the register contents. This is
 especially true while writing to a bit (or group of bits) among bits 16 - 31 */

struct ECAN_REGS ECanaShadow;

/* Kill Watchdog, Enable peripheral clocks */

   InitSysCtrl();

/* Initialize the CAN module */

	InitECan();

	InitECanGpio(); 	
       	
/* Write to the MSGID field  */
    
	EALLOW;
    ECanaMboxes.MBOX0.MSGID.all = 0x15540000;

	/* Configure bit timing parameters for eCANA*/

    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.CCR = 1 ;            // Set CCR = 1
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

    // Wait until the CPU has been granted permission to change the configuration registers
    do
    {
      ECanaShadow.CANES.all = ECanaRegs.CANES.all;
    } while(ECanaShadow.CANES.bit.CCE != 1 );       // Wait for CCE bit to be set..

    ECanaShadow.CANBTC.all = 0;
    /* The following block is for 90 MHz SYSCLKOUT. (45 MHz CAN module clock Bit rate = 1 Mbps
       See Note at end of file. */

    ECanaShadow.CANBTC.bit.BRPREG = 5;	// 2 for 1 Mbps, 5 for 500 kbps, 11 for 250 kbps, 23 for 125 kbps, 29 for 100 kbps
    ECanaShadow.CANBTC.bit.TSEG2REG = 3;
    ECanaShadow.CANBTC.bit.TSEG1REG = 9;

    ECanaShadow.CANBTC.bit.SAM = 1;
    ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;

    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.CCR = 0 ;            // Set CCR = 0
	ECanaShadow.CANMC.bit.ABO = 1;
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

    // Wait until the CPU no longer has permission to change the configuration registers
    do
    {
      ECanaShadow.CANES.all = ECanaRegs.CANES.all;
    } while(ECanaShadow.CANES.bit.CCE != 0 );       // Wait for CCE bit to be  cleared..
       
/* Configure Mailbox under test as a Transmit mailbox */

	ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;	
	ECanaShadow.CANMD.bit.MD0= 0;
	ECanaRegs.CANMD.all = ECanaShadow.CANMD.all; 
	
/* Enable Mailbox under test */
	
	ECanaShadow.CANME.all = ECanaRegs.CANME.all;	
	ECanaShadow.CANME.bit.ME0 = 1;
	ECanaRegs.CANME.all = ECanaShadow.CANME.all; 
	
/* Write to DLC field in Master Control reg */

	ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 0;
	
/* Write to the mailbox RAM field */
    
     ECanaMboxes.MBOX0.MDL.all = 0x01234567;
	 ECanaMboxes.MBOX0.MDH.all = 0x89ABCDEF;

/* Begin transmitting */

	while(1)
	//for(i=0;i<COUNT;i++)
	{
     ECanaShadow.CANTRS.all = 0; 	
     ECanaShadow.CANTRS.bit.TRS0 = 1;     // Set TRS for mailbox under test       
     ECanaRegs.CANTRS.all = ECanaShadow.CANTRS.all; 

     ECanaShadow.CANTA.all = ECanaRegs.CANTA.all;
		do 
		{
		ECanaShadow.CANTA.all = ECanaRegs.CANTA.all;	// Wait for TA25 bit to be set..
		if(ECanaRegs.CANTEC.all > 250) {BO_counter++;}	// Increment this counter if node goes BO
		if(ECanaRegs.CANREC.all > 250) {BO_counter++;}	// Increment this counter if node goes BO

		ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    	if(ECanaShadow.CANMC.bit.CCR == 1) {BO_counter++;} ;            // Set CCR = 0
		}          
         while(ECanaShadow.CANTA.bit.TA0 == 0 );      
     
     ECanaShadow.CANTA.all = 0; 	
     ECanaShadow.CANTA.bit.TA0 = 1;     	 // Clear TA5       
     ECanaRegs.CANTA.all = ECanaShadow.CANTA.all;
	 loopcount++;
	 }

  
}

/* Notes:


Tested: 3/12/2014
               			 
*/